AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 399

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

ADC Channel Enable Register
Register Name:ADC_CHER
Access Type:Write-only
• CHx: Channel x Enable
0 = No effect.
1 = Enables the corresponding channel.
ADC Channel Disable Register
Register Name:ADC_CHDR
Access Type:Write-only
• CHx: Channel x Disable
0 = No effect.
1 = Disables the corresponding channel.
Warning: If the corresponding channel is disabled during a conversion or if it is disabled then reenabled during a conver-
sion, its associated data and its corresponding EOC and OVRE flags in ADC_SR are unpredictable.
6071A–ATARM–28-Oct-04
CH7
CH7
31
23
15
31
23
15
–
–
–
–
–
–
7
7
CH6
CH6
30
22
14
30
22
14
–
–
–
6
–
–
–
6
CH5
CH5
29
21
13
29
21
13
–
–
–
–
–
–
5
5
CH4
CH4
28
20
12
28
20
12
–
–
–
–
–
–
4
4
CH3
CH3
27
19
11
27
19
11
–
–
–
3
–
–
–
3
AT91SAM7S32 Preliminary
CH2
CH2
26
18
10
26
18
10
–
–
–
2
–
–
–
2
CH1
CH1
25
17
25
17
–
–
–
1
–
–
–
1
9
9
CH0
CH0
24
16
24
16
–
–
8
–
0
–
–
8
–
0
399