AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet - Page 259

• Manufacturer Part Number: AT91SAM7S32-AI
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

TWI Internal Address Register
Register Name:
Access Type:
• IADR: Internal Address
0, 1, 2 or 3 bytes depending on IADRSZ.
TWI Clock Waveform Generator Register
Register Name:
Access Type:
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
6071A–ATARM–28-Oct-04
T
T
low
hi gh
=
=
31
23
15
31
23
15
–
7
–
–
7
CLDIV
CHDIV
2
CKDIV
2
CKDIV
30
22
14
30
22
14
TWI_IADR
Read/Write
–
6
TWI_CWGR
Read/Write
–
–
6
+
+
3
3
T
MCK
T
MCK
29
21
13
29
21
13
–
5
–
–
5
28
20
12
28
20
12
–
4
–
–
4
CHDIV
CLDIV
IADR
IADR
IADR
27
19
27
19
11
11
–
3
–
–
3
AT91SAM7S32 Preliminary
26
18
10
26
18
10
–
2
–
2
CKDIV
25
17
25
17
–
9
1
–
9
1
24
16
24
16
–
8
0
–
8
0
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