AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 812

• Manufacturer Part Number: AT32UC3L064_1
• Description: AVR32 32-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

35.2.15
35.2.16
32099A–AVR32–06/09
ACIFB
USART
2. 8-bit mode is not working
3. ADC channels six to eight is non-functional
4. VERSION register reads 0x100
1. Negative offset
2. Generic clock sources in sleep modes
3. VERSION register reads 0x200
4. CONFW.WEVSRC and CONFW.WEVEN are not correctly described in the user
1. The RTS output does not function correctly in hardware handshaking mode
Use a sleep mode where CLK_ADCIFB is not turned off to wake the part using
pendetect.
Do not use the 8-bit mode of the ADCIFB.
Fix/Workaround
Use the 10-bit mode and shift right by 2 bits.
ADC channels six to eight is non-functional.
Fix/Workaround
None.
The VERSION register reads 0x100 instead of 0x101.
Fix/Workaround
None.
The static offset of the analog comparator is appriximately -50mV.
Fix/Workaround
None.
The ACIFB should not use RC32K, or CLK_1K as generic clock source if the chip uses
sleep modes.
Fix/Workaround
None.
The VERSION register reads 0x200 instead of 0x212.
Fix/Workaround
None.
interface
CONFW.WEVSRC is only two bits instead of three bits wide. Only values 0, 1, and 2 can be
written to this register. CONFW.WEVEN is in bit position 10 instead of 11.
Fix/workaround
Only write values 0, 1, and 2 to CONFW.WEVSRC. When reading CONFW.WEVSRC, dis-
regard the third bit. Read/write bit 10 to access CONFW.WEVEN.
The RTS signal is not generated properly when the USART receives data in hardware hand-
shaking mode. When the Peripheral DMA receive buffer becomes full, the RTS output
should go high, but it will stay low.
Fix/workaround
Do not use the hardware handshaking mode of the USART. If it is necessary to drive the
RTS output high when the Peripheral DMA receive buffer becomes full, use the normal
mode of the USART. Configure the Peripheral DMA Controller to signal an interrupt when
AT32UC3L
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