MC9S12DG256C FREESCALE [Freescale Semiconductor, Inc], MC9S12DG256C Datasheet - Page 101

• Manufacturer Part Number: MC9S12DG256C
• Description: device made up of standard HCS12 blocks and the HCS12 processor core
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

A.3.2 NVM Reliability
The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process
monitors and burn-in to screen early life failures.
The failure rates for data retention and program/erase cycling are specified at the operating conditions
noted.
The program/erase cycle count on the sector is incremented every time a sector or mass erase event is
executed.
3. Maximum Erase and Programming times are achieved under particular combinations of f
4. urst Programming operations are not applicable to EEPROM
5. Minimum Erase times are achieved under maximum NVM operating frequency f
6. Minimum time, if first word in the array is not blank
7. Maximum time to complete check on an erased block
Refer to formulae in Sections A.3.1.1 - A.3.1.4 for guidance.
NOTE:
NOTE:
NOTE:
Conditions are shown in Table A-4 unless otherwise noted
Num C
1
2
All values shown in Table A-12 are target values and subject to further extensive
characterization.
Flash cycling performance is 10 cycles at -40C to + 125C. Data retention is
specified for 15 years.
EEPROM cycling performance is 10K cycles at -40C to +125C. Data retention is
specified for 5 years on words after cycling 10K times. However if only 10 cycles
are executed on a word the data retention is specified for 15 years.
C Flash/EEPROM (-40C to + 125C)
C EEPROM (-40C to + 125C)
Table A-12 NVM Reliability Characteristics
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MC9S12DP256B Device User Guide — V02.15
Cycles
10,000
10
NVMOP
.
Retention
NVMOP
Lifetime
Data
15
5
and bus frequency f
Years
Years
Unit
bus
.
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