MC9S12DG256C FREESCALE [Freescale Semiconductor, Inc], MC9S12DG256C Datasheet - Page 11

• Manufacturer Part Number: MC9S12DG256C
• Description: device made up of standard HCS12 blocks and the HCS12 processor core
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

List of Figures
Figure 0-1
Figure 1-1
Figure 1-2
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 3-1
Figure 20-1 Recommended PCB Layout 112 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
Figure 20-2 Recommended PCB Layout for 80QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86
Figure A-1
Figure A-2
Figure A-3
Figure A-4
Figure A-5
Figure A-6
Figure A-7
Figure A-8
Figure A-9
Figure B-1
Figure B-2
Order Part Number Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
MC9S12DP256B Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
MC9S12DP256B Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Pin Assignments in 112-pin LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Pin Assignments in 80-pin QFP for MC9S12DG256 . . . . . . . . . . . . . . . . . . . . . .55
Pin Assignments in 80-pin QFP for MC9S12DJ256 . . . . . . . . . . . . . . . . . . . . . .56
PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Jitter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Maximum bus clock jitter approximation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
SPI Slave Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
112-pin LQFP mechanical dimensions (case no. 987) . . . . . . . . . . . . . . . . . . 124
80-pin QFP Mechanical Dimensions (case no. 841B) . . . . . . . . . . . . . . . . . . . 125
Freescale Semiconductor, Inc.
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MC9S12DP256B Device User Guide — V02.15
11