HYB18T512400AC Infineon Technologies AG, HYB18T512400AC Datasheet - Page 16

• Manufacturer Part Number: HYB18T512400AC
• Description: DDR2 Registered Memory Modules
• Manufacturer: Infineon Technologies AG

4.5 I
For testing the IDD parameters, the following timing parameters are used:
4.6 ODT (On Die Termination) Current
The ODT function adds additional current consumption to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a “week” or “strong” termination can be selected. The cur-
rent consumption for any terminated input pin, depends on the input pin is in tri-state or driving “0” or “1”, as long
a ODT is enabled during a given period of time.
ODT current per terminated pin:
Data Sheet
Preliminary
CAS Latency
Clock Cycle Time
Active to Read or Write delay
Active to Active / Auto-Refresh command period
Active bank A to Active bank B command delay
Active to Precharge Command
Precharge Command Period
Auto-Refresh to Active / Auto-Refresh command period
Average periodic Refresh interval
Enabled ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; Data Bus inputs are FLOATING
Active ODT current per DQ
added IDDQ current for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs are STABLE or SWITCHING.
note: For power consumption calculations the ODT duty cycle has to be taken into account
DD
Measurement Conditions (cont’d)
Parameter
HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
x4 & x8
16
tRCDmin
tRRDmin
tRASmin
tRFCmin
Registered DDR2 SDRAM Modules
Symbol
tRCmin
tCKmin
tRPmin
CLmin
tREFI
IODTO
IODTT
PC2-3200R “-5“
EMRS(1) State min. typ. max.
3-3-3
A6 = 0, A2 = 1
A6 = 1, A2 = 0
A6 = 0, A2 = 1
A6 = 1, A2 = 0
105
7.5
7.8
15
60
45
15
3
5
PC2-4300R “-3.7”
2.5
10
Rev. 0.85, 2004-04
5
5
4-4-4
3.75
105
7.5
7.8
15
60
12
45
15
6
3
6
4
3.75 mA/DQ
7.5
7.5
15
mA/DQ
mA/DQ
mA/DQ
Unit
Unit
tCK
ns
ns
ns
ns
ns
ns
ns
µs