HYB18T512400AC Infineon Technologies AG, HYB18T512400AC Datasheet - Page 17

• Manufacturer Part Number: HYB18T512400AC
• Description: DDR2 Registered Memory Modules
• Manufacturer: Infineon Technologies AG

5.0 Electrical Characteristics & AC Timings
5.1 AC Timing Parameter by Speed Grade
Data Sheet
Preliminary
Symbol
t
t
t
t
LZ(DQS)
t
t
t
DQSL,H
t
DQSCK
t
t
t
LZ(DQ)
DQSQ
t
t
WPRE
DQSS
t
t
WPST
t
t
t
RPRE
RPST
DIPW
t
MRD
t
t
t
t
t
t
t
t
QHS
DSH
t
DSS
RAS
RFC
t
IPW
t
CH
DH
QH
RC
AC
CL
HP
CK
DS
HZ
IS
IH
DQ output access time from CK / CK
DQS output access time from CK / CK
CK, CK high-level width
CK, CK low-level width
Clock Half Period
Clock cycle time
Address and control input setup time
Address and control input hold time
DQ and DM input setup time
DQ and DM input hold time
Control and Addr. input pulse width (each input)
DQ and DM input pulse width (each input)
Data-out high-impedance time from CK / CK
DQ low-impedance from CK / CK
DQS low-impedance from CK / CK
DQS-DQ skew
(for DQS & associated DQ signals)
Data hold skew factor
Data Output hold time from DQS
Write command to 1st DQS latching transition
DQS input low (high) pulse width (write cycle)
DQS falling edge to CLK setup time
(write cycle)
DQS falling edge hold time from CLK
(write cycle)
Mode register set command cycle time
Write preamble
Write postamble
Read preamble
Read postamble
Active to Precharge command
Active to Active/Auto-refresh command period
Auto-refresh to Active/Auto-refresh command period
Parameter
CL = 3
CL = 4 & 5
HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A
(Component level data, for reference only)
17
Registered DDR2 SDRAM Modules
2*tACmin
t
tACmin
HP-tQHS
-0.25
5000
5000
0.45
0.45
0.35
0.35
0.25
0.40
0.40
Min
600
600
400
400
105
WL
0.6
0.2
0.2
0.9
45
60
600
500
2
-
-
-
min. (t
DDR2-400
-5
CL,
tACmax
tACmax
tACmax
t
CH)
70000
+0.25
8000
8000
Max
0.55
0.55
0.60
0.60
350
450
WL
1.1
600
500
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2*tACmin
t
tACmin
HP-tQHS
-0.25
5000
3750
-500
0.45
0.45
0.35
0.35
0.25
0.40
0.40
Min
600
600
350
350
105
WL
0.6
0.2
0.2
0.9
450
45
60
2
-
-
-
min. (t
DDR2-533
Rev. 0.85, 2004-04
-3.7
CL,
tACmax
tACmax
tACmax
t
CH)
70000
+0.25
+500
8000
8000
Max
0.55
0.55
0.60
0.60
300
400
WL
1.1
450
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
t
t
t
t
t
t
t
t
t
t
t
t
t
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK