UPSD3233 STMicroelectronics, UPSD3233 Datasheet - Page 174

• Manufacturer Part Number: UPSD3233
• Description: Flash Programmable System Devices with 8032 Microcontroller Core
• Manufacturer: STMicroelectronics

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
REVISION HISTORY
Table 145. Document Revision History
Table 146. Device Functional Change History
Note: Date Code is the 6th to the 9th digit of the Trace Code on top of the device.
174/175
November 2002
DDC SRAM Mapping
Functional Change
USB Reset Function
02-Sep-03
27-Feb-03
Date
PWM Block
Rev. #
1.0
1.1
1.2
An 8-bit, Programmable PWM 4 channel
and the associated registers are added.
When DDC is disabled, the data space
FF00h-FFFFh assigned to DDC SRAM is
available for external data mapping. The
SWENB Bit definition in the DDCON
Register is modified.
1. Option to block USB generated reset
2. Allow USB Reset Flag (RSTF) to interrupt
3. Add RSTE and RSTFIE Bits to the UIEN
First Issue
Updates: product information (Figure 3, 4, Table 1, 2); port information (Figure 17, 18,
Table 30); interface information (Figure 30, Table 44); remove programming guide; PSD
Module information (Figure 50, 51, Table 85); PLD information (Figure 58, 59, Table 91,
92, 93); electrical characteristics (Table 113, 114, 130, 131)
Updated references for Product Catalog
from resetting the MCU/PSD modules.
MCU.
Interrupt Enable Register.
After Date Code 0242
Revision Details
Only PWM0-PWM3 channels are
available.
Data space FF00h-FFFFh is dedicated to
DDC SRAM.
USB-generated reset always resets both,
the USB and the MCU/PSD modules.
Date Code 0242 and before