AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 128

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

CSR26: Next Receive Descriptor Address Lower
Bit
31–16 RES
15–0 NRDAL
CSR27: Next Receive Descriptor Address Upper
Bit
31–16 RES
15–0 NRDAU
CSR28: Current Receive Descriptor Address
Lower
Bit
31–16 RES
15–0 CRDAL
CSR29: Current Receive Descriptor Address
Upper
Bit
31–16 RES
128
AMD
Name
Name
Name
Name
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of
the
address pointer.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of
the
address pointer.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of
the current receive descriptor
address pointer.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
next
next
receive
receive
accessible
accessible
accessible
descriptor
descriptor
P R E L I M I N A R Y
only
only
only
Am79C970A
15–0 CRDAU
CSR30: Base Address of Transmit
Descriptor Ring Lower
Bit
31–16 RES
15–0 BADXL
CSR31: Base Address of Transmit
Descriptor Ring Upper
Bit
31–16 RES
15–0 BADXU
CSR32: Next Transmit Descriptor Address Lower
Bit
31–16 RES
15–0 NXDAL
Name
Name
Name
Contains the upper 16 bits of
the current receive descriptor
address pointer.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
base address of the transmit
descriptor ring.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
base address of the transmit
descriptor ring.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of
the next transmit descriptor
address pointer.
Read/Write
when either the STOP or the
SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET or by setting the
STOP bit.
accessible
accessible
accessible
accessible
only
only
only
only