M368L3223ETM-CC5 SAMSUNG [Samsung semiconductor], M368L3223ETM-CC5 Datasheet - Page 3

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M368L3223ETM-CC5

Manufacturer Part Number
M368L3223ETM-CC5
Description
184pin Unbuffered Module based on 256Mb E-die 64/72-bit ECC/Non ECC
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
256MB, 512MB DDR466 Unbuffered DIMM
184Pin Unbuffered DIMM based on 256Mb E-die (x8)
Ordering Information
Operating Frequencies
Feature
• Power supply : Vdd: 2.6V ± 0.1V, Vddq: 2.6V ± 0.1V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333
• Programmable Burst length (2, 4, 8)
• Programmable Burst type (sequential & interleave)
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
• Serial presence detect with EEPROM
• PCB : Height 1,250 (mil), single (256MB) and double(512MB) sided
• SSTL_2 Interface
M368L3223ETM-C(L)C5
M368L6423ETM-C(L)C5
M381L3223ETM-C(L)C5
M381L6423ETM-C(L)C5
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
CL-tRCD-tRP
Speed @CL3
Part Number
Density
256MB
512MB
256MB
512MB
C5(DDR466@CL=3)
233MHz
Organization
3-4-4
32M x 64
64M x 64
32M x 72
64M x 72
32Mx8( K4H560838E) * 8EA
32Mx8( K4H560838E) * 16EA
32Mx8( K4H560838E) * 9EA
32Mx8( K4H560838E) * 18EA
Revision 1.0 December, 2003
Component Composition
DDR SDRAM
1,250mil
1,250mil
1,250mil
1,250mil
Height

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