LC786800E SANYO [Sanyo Semicon Device], LC786800E Datasheet
LC786800E
Related parts for LC786800E
LC786800E Summary of contents
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... LC786800E Overview The LC786800E integrates ARM7TDMI-S™, USB host processing, SD memory card host processing, Compressed audio encode/decode processing, Audio signal processing, Electronic volume and a flash memory which stores the program for ARM7TDMI-S™ and the various data. The sophisticated programs in the flash memory for the USB host processing or for the SD memory card processing or Electronic Volume control processing, etc ...
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... Corresponding in one of two ways. (1) 384Fs input and three lines input synchronized. (2) 384Fs output and three lines input synchronized. Data Format: IIS, MSB first right justified, etc. LC786800E MPEG1-Layer1/2/3 (32kHz, 44.1kHz, 48kHz) MPEG2-Layer1/2/3 (16kHz, 22.05kHz, 24kHz) MPEG2.5-Layer3 (8kHz, 11.025kHz, 12kHz) All Bit Rate (Variable Bit Rate support) 44 ...
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... Power management 2 kinds of sleep mode (1) Only CPU core operates at slow clock and clocks for other blocks are stopping. (2) All clocks are stopping. LC786800E 37 ports maximum (Shared with other functions. Several pins are 5V tolerant.) clock synchronized full duplex (3 lines) full duplex ...
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... Up to quadruple speed operation available • CD-ROM decoding (Mode1, Mode2<form1, form2>) • Outputs CD-ROM decoded data * Necessary to connect three signals (LRCK, BCK and DATA possible if desired to connect C2 error flag. [Others] <Internal power supply> • 1.5V regulator for internal blocks LC786800E No.A2082-4/26 ...
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... High-level input voltage (2) Low-level input voltage (2) Oscillator frequency FX1 LC786800E Pin names Input pins other than RESB, SIFCK, SIFDI, SIFDO, SIFCE, BUSYB, GP03, GP04, GP05, GP06, GP07, GP10, ...
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... IAFILH IAFILL <Note> • Put a internal pull down resistor or external pull down resistor or external pull up resistor to the SIFDO pin if its output condition is set to 3-State mode. LC786800E Pin names Conditions RESB, SIFCK, SIFDI, SIFDO, ...
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... Package Dimensions unit : mm (typ) 3151A 23.2 20 100 1 0.65 0.3 (0.58) SANYO : QIP100E(14X20) LC786800E 0.15 No.A2082-7/26 ...
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... R3INN 16 ATESTO1 17 ATESTO2 18 VREFOUT 19 VREF_ADC GP50 27 GP51 28 GP52 29 GP53 30 LC786800E Top view AFILT XOUT 74 XIN UDP2 71 UDM2 UDP1 68 UDM1 ...
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... REG1EXTR AO Undefined LC786800E "Reset" Electronic Volume : Left channel Front output Electronic Volume : Left channel Rear output Input Electronic Volume : Left channel volume input Audio DAC : Left channel output Audio DAC : Right channel output Input Electronic Volume : Right channel volume input ...
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... GP04 I/O 83 GP05 I/O LC786800E "Reset" General purpose I/O port with pull down resistor Input (L) UART1 data transmit General purpose I/O port with pull down resistor Input (L) UART1 data receive General purpose I/O port with pull down resistor Input (L) Clock control input 1 General purpose I/O port with pull down resistor ...
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... Refer to “Power on and Reset control” for detail of “Reset” condition. (4) For “Analog Source” unused pins (9 pin to 16 pin): • The “Analog Source” unused pins (9 pin to 16 pin) must be connected to the GND (0V) level through the input coupling capacitor. LC786800E "Reset" Input (L) General purpose I/O port with pull down resistor ...
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... PLL1 PLL2 ASS & ADC ARM7 Core Flash memory USB Host Controller USB-I/F SD Memory Card Controller Host-I/F (SIO/IIC) 1.5V Regulator 3.3V LC786800E CDROM Decoder CDTEXT Decoder External Input Data Interface BUFRAM Cache I/F Boot Work ROM RAM Watch Dog Timer Interrupt UART IIC SIO ...
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... Reset time (Normal) (*1) *1: The x'tal oscillation must be stable during tRESW2. When the x'tal clock has been stopped by the command etc., the specification of tRESW2 could be longer than the value shown above, because it takes time that the x'tal oscillator becomes stable. LC786800E tPWD tRESW1 Symbol ...
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... BUSYB Transmission/Reception format between Host controller (1) Host: Command Transmission SIFCE 1 2 SIFCK M5 M4 SIFDI SIFDO BUSYB (2) Host: Data Reception SIFCE 1 2 SIFCK SIFDI M5 M4 SIFDO BUSYB LC786800E Command Command MODE 2 N (Receive) Ack ...
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... Output delay time for SIFDO Turn on time for SIFDO *1 Turn off time for SIFDO *1 BUSYB "L" level output delay time *1: The tCDON and tCDOF specifications are for when the SIFDO pin is set to the 3-State mode. LC786800E 1/fCLK tCKL tCWSU tCWHD tCRAS ...
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... USB data rising time TUR USB data falling time TUF Example circuit for USB application LC786800 UDP1 /UDP2 UDM1 /UDM2 LC786800E Symbol Pin names Conditions Output driver: OFF |(UDP) - (UDM)| Includes VDI range UDM1, UDP1, Connect 15k Ω ±5% pull-down UDM2, UDP2 resistor to GND (0V). Connect 1.5k Ω ...
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... Setup time for data input Hold time for data input Data output valid time Note: Internal CPU (ARM7) must be set to normal mode. Never use the SD Memory Card interface at the internal CPU’s Low speed mode. LC786800E tSDCKL tSDCKH 1/fSDCKF tSDCMH tSDCDH ...
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... HPF cut off frequency for DC offset cancelation (Electronic volume) Input impedance Volume setting range Mute level Volume setting step Volume setting step error LC786800E Fs=44.1kHz, Audio Signal Frequency: 1kHz, Measurement Range: 10Hz to 20kHz Pin names Conditions L1IN, R1IN, L2IN, 0dB Data, ...
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... Bit clock frequency Bit clock "H" level width Bit clock "L" level width Setup time for LRCK input Hold time for LRCK input Setup time for DATA input Hold time for DATA input LC786800E Data Length 16bit 24bit 16bit 24bit BCK ...
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... Bit clock "H" level width Bit clock "L" level width LRCK output delay time BCK output delay time DATA output delay time *1: In case of setting the 48-slot length for output format 44.1kHz. LC786800E tFCKOL tDL1 tABKOH tABKOL tDL2 tDL3 ...
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... Also you need to select parts with caution obtain stable external constant value within the guaranteed operating temperature range because the variation of external constant due to temperature change could affect the oscillation precision. • Concerning about internal circuit for XIN/XOUT, refer to the “Analog Pin Internal Equivalent Circuits” section. LC786800E Condition 3. 3.3V * Same circuit need to be mounted both for two regulator pins ...
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... As the internal system clock used in built-in CPU and USB becomes unstable, the LSI operation is affected as well. Hence, you need to select parts with caution obtain stable filter constant value within the guaranteed operating temperature range. • See the section on “Analog Pin Internal Equivalent Circuits” for the internal configuration of AFILT. LC786800E Rp1 Cp2 Cp1 PLL1 ...
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... LVRIN (3) RVRIN (6) DACOUTL (4) DACOUTR (5) L1IN (9) R1IN (10) L2IN (11) R2IN (12) L3INP (13) L3INN (14) R3INP (15) R3INN (16) VREFOUT (19) VREF_ADC (20) XIN (74) XOUT (75) LC786800E Equivalent circuit ...
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... Continued from the previous page. Pin Name (Pin No.) AFILT (77) LRREF (100) LC786800E Equivalent circuit No.A2082-24/26 ...
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... NC NC GP50 GP51 GP52 GP53 • Take care to the input voltage level of the analog audio input. • Concerning to the application circuit for USB, Regulator and Oscillator, refer to the page 16 and 21 respectively. LC786800E Serial-l AFILT XV SS XOUT XV DD ...
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... SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of August, 2012. Specifications and information herein are subject to change without notice. LC786800E PS No.A2082-26/26 ...