IS43DR86400C-25DBLI-TR ISSI, IS43DR86400C-25DBLI-TR Datasheet - Page 19

• Manufacturer Part Number: IS43DR86400C-25DBLI-TR
• Description: DRAM 512M, 1.8V, 400Mhz 64Mx8 DDR2
• Manufacturer: ISSI

Specifications of IS43DR86400C-25DBLI-TR

• Rohs: yes
• Data Bus Width: 8 bit
• Organization: 64 M x 8
• Package / Case: BGA-60
• Memory Size: 512 Mbit
• Maximum Clock Frequency: 400 MHz
• Access Time: 400 ps
• Supply Voltage - Max: 1.9 V
• Supply Voltage - Min: 1.7 V
• Maximum Operating Current: 135 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

IS43/46DR86400C, IS43/46DR16320C
Timing Parameters by Speed Grade (DDR2-667 and DDR2-800)
(For information related to the entries in this table, refer to both the Guidelines and the Specific Notes following this Table.)
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
3/19/2013
Parameter
Average clock period
Average clock HIGH pulse width
Average clock LOW pulse width
DQS latching rising transitions to associated
clock edges
DQS falling edge to CK setup time
DQS falling edge hold time from CK
DQS input HIGH pulse width
DQS input LOW pulse width
Write preamble
Write postamble
Address and control input setup time
Address and control input hold time
Control & Address input pulse width for each
input
DQ and DM input setup time
DQ and DM input hold time
DQ and DM input pulse width for each input
DQ output access time from CK/CK
DQS output access time from CK/CK
Data-out high-impedance time from CK/CK
DQS/DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ
signals
CK half pulse width
DQ hold skew factor
DQ/DQS output hold time from DQS
Read preamble
Read postamble
Symbol
tCK(avg)
tCH(avg)
tCL(avg)
tDQSS
tDSS
tDSH
tDQSH
tDQSL
tWPRE
tWPST
tIS(base)
tIH(base)
tIPW
tDS(base)
tDH(base)
tDIPW
tAC
tDQSCK
tHZ
tLZ(DQS)
tLZ(DQ)
tDQSQ
tHP
tQHS
tQH
tRPRE
tRPST
2 x tAC,min tAC,max 2 x tAC,min
tHP - tQHS
tCL(abs) )
tCH(abs),
tAC,min
- 0.25
- 450
- 400
Min.
0.45
0.45
0.35
0.35
0.35
0.35
Min(
200
275
175
0.2
0.2
0.4
0.6
0.9
0.4
50
3
–
–
–
DDR2-667
tAC,max
tAC,max
Max.
0.55
0.55
0.25
450
400
240
340
0.6
1.1
0.6
8
–
–
–
–
–
–
–
–
–
–
–
–
–
tHP - tQHS
tCL(abs) )
tCH(abs),
tAC,min
- 0.25
- 400
- 350
Min.
0.45
0.45
0.35
0.35
0.35
0.35
Min(
175
250
125
2.5
0.2
0.2
0.4
0.6
0.9
0.4
50
–
–
–
DDR2-800
Max
0.55
0.55
0.25
tAC,
max
tAC,
max
tAC,
max
400
350
200
300
0.6
1.1
0.6
8
–
–
–
–
–
–
–
–
–
–
–
–
–
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
Units
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
5, 7, 9, 22,
5, 7, 9, 23,
6, 7, 8, 20,
6, 7, 8, 21,
Notes
28, 31
28, 31
35,36
35,36
35,36
18,40
18,40
18,40
19,41
19,42
30
30
30
10
29
29
40
40
13
37
38
39
19