C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 369

• Manufacturer Part Number: C8051F961-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
• Manufacturer: Silicon Labs

Specifications of C8051F961-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-40
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 34
• Number Of Timers: 4

SFR Definition 27.18. P2: Port2
SFR Page = All Pages; SFR Address = 0xA0; Bit-Addressable
SFR Definition 27.19. P2SKIP: Port2 Skip
SFR Page = 0x0; SFR Address = 0xD6
Name
Reset
Name
Reset
Type
Type
7:0
Bit
7:0
Bit
Bit
Bit
P2SKIP[7:0]
P2[7:0]
Name
Name
7
1
7
0
Port 2 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 1 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
6
1
6
0
Description
Description
5
1
5
0
Rev. 0.5
4
1
4
0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P2SKIP[7:0]
P2[7:0]
R/W
R/W
Read
Read
3
1
3
0
2
1
2
0
0: P2.n Port pin is logic
LOW.
1: P2.n Port pin is logic
HIGH.
C8051F96x
1
1
1
0
Write
Write
0
1
0
0
369