MK40DN512VMD10 Freescale Semiconductor, MK40DN512VMD10 Datasheet - Page 64

• Manufacturer Part Number: MK40DN512VMD10
• Description: ARM Microcontrollers - MCU KINETIS 512K USB LCD
• Manufacturer: Freescale Semiconductor

Specifications of MK40DN512VMD10

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K40
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: MAPBGA-144
• Mounting Style: SMD/SMT

Peripheral operating requirements and behaviors
1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear
64
S11
S12
S13
S14
S15
S16
S17
S18
S19
I2S_MCLK (output)
I2S_TX_BCLK/
I2S_RX_BCLK (output)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Table 46. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes
Operating voltage
I2S_TX_BCLK/I2S_RX_BCLK cycle time (input)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
(input)
I2S_TX_FS/I2S_RX_FS input setup before
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_FS/I2S_RX_FS input hold after
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid
I2S_RXD setup before I2S_RX_BCLK
I2S_RXD hold after I2S_RX_BCLK
I2S_TX_FS input assertion to I2S_TXD output valid
• Multiple SAI Synchronous mode
• All other modes
(limited voltage range)
S5
S7
Figure 25. I2S/SAI timing — master modes
Characteristic
S4
K40 Sub-Family Data Sheet, Rev. 2, 12/2012.
S9
S9
S1
S3
S2
S10
S4
S2
1
S8
2.7
80
45%
4.5
2
—
—
0
4.5
2
—
S7
Min.
3.6
—
55%
—
—
21
15
—
—
—
25
Max.
Freescale Semiconductor, Inc.
V
ns
MCLK period
ns
ns
ns
ns
ns
ns
ns
Unit
S10
S6
S8