MPXN2120VMG116 Freescale Semiconductor, MPXN2120VMG116 Datasheet - Page 42

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MPXN2120VMG116

Manufacturer Part Number
MPXN2120VMG116
Description
Microprocessors - MPU 32BIT2M NVM GATEWAY
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPXN2120VMG116

Rohs
yes
Processor Series
PXN21
Core
e200
Data Bus Width
32 bit
Maximum Clock Frequency
60 MHz
Program Memory Size
2 MB
Data Ram Size
32 KB
Interface Type
CAN, I2C, SPI, UART
Operating Supply Voltage
- 0.3 V to + 1.32 V
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-208
Number Of Programmable I/os
155

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Part Number:
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Electrical characteristics
1
2
3
4
5
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8
42
Spec
These are worst case values that are estimated from simulation and not tested. The values in the table are simulated at
F
T
Slow = SH or SHA; Medium = MH or MHA; Fast = F; Input = IHA. See
SRC/DSC are bit fields in the Pad Configuration Registers. SRC—Slew Rate Control (slow and medium pad types only),
DSC—Drive Strength Control (fast pad type only).
This parameter is supplied for reference and is not guaranteed by design and not tested.
Delay and rise/fall are measured to 20% or 80% of the respective signal.
This parameter is guaranteed by characterization before qualification rather than 100% tested.
Add a maximum of one system clock to the output delay for delay with respect to system clock.
Output delay is shown in
clock.
3
4
SYS
H
.
Internal Data Input Signal
= 116 MHz, V
Pad
Pad Type
DD
Table 24. De-rated pad AC specifications (3.3 V, 3.3 V)
Fast
Input
= 1.08 – 1.32 V, V
Figure
8
2
6. Add a maximum of one system clock to the output delay for delay with respect to system
Pad
Output
PXN20 Microcontroller Data Sheet, Rev. 1
DDE
Rising
Edge
Out
Delay
SRC/DSC
= 3.0 – 3.6 V, V
Figure 6. Pad output delay
N/A
00
01
10
11
3
DDEH
Out Delay
= 3.0 – 3.6 V, V
(ns)
2.5
3/3
Table
4,5
Falling
Edge
Out
Delay
3.
RC33
1
Rise/Fall
(continued)
and V
1.5/1.5
(ns)
1.2
1.2
1.2
1.2
DDPLL
6,
Freescale Semiconductor
= 3.0 – 3.6 V, T
Load Drive
VDD/2
(pF)
V
0.5
V
10
20
30
50
OL
OH
A
= T
L
to

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