STM32F051R4T6TR STMicroelectronics, STM32F051R4T6TR Datasheet - Page 23

• Manufacturer Part Number: STM32F051R4T6TR
• Description: ARM Microcontrollers - MCU ARM Cortex M0 16kB 48 MHz CPU 8kB Flash
• Manufacturer: STMicroelectronics

Specifications of STM32F051R4T6TR

• Rohs: yes

STM32F051x
3.16
Inter-integrated circuit interfaces (I
Up to two I
can support Standard mode (up to 100 kbit/s) or Fast mode (up to 400 kbit/s) and I2C1
supports also Fast Mode Plus (up to 1 Mbit/s) with 20 mA output drive.
Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (2
addresses, 1 with configurable mask). They also include programmable analog and digital
noise filters.
Table 8.
In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP
capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts
verifications and ALERT protocol management. I2C1 also has a clock domain independent
from the CPU clock, allowing the I2C1 to wake up the MCU from Stop mode on address
match.
The I2C interfaces can be served by the DMA controller.
Refer to
Table 9.
1. X = supported.
Pulse width of
suppressed spikes
Benefits
Drawbacks
7-bit addressing mode
10-bit addressing mode
Standard mode
Fast mode
Fast Mode Plus with 20mA output drive I/Os
Independent clock
SMBus
Wakeup from STOP
Table 9
2
C interfaces (I2C1 and I2C2) can operate in multimaster or slave modes. Both
(up to 400 kbit/s)
Comparison of I2C analog and digital filters
STM32F051x I
for the differences between I2C1 and I2C2.
(up to 100 kbit/s)
≥ 50 ns
Available in Stop mode
Variations depending on
temperature, voltage, process
I2C features
2
C implementation
Doc ID 022265 Rev 3
Analog filter
(1)
(up to 1 Mbit/s)
2
C)
Programmable length from 1 to 15
I2C peripheral clocks
1. Extra filtering capability vs.
standard requirements.
2. Stable length
Disabled when Wakeup from Stop
mode is enabled
Digital filter
Functional overview
I2C1
X
X
X
X
X
X
X
X
I2C2
X
X
X
X
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