STM32F051R4T6TR STMicroelectronics, STM32F051R4T6TR Datasheet - Page 85

• Manufacturer Part Number: STM32F051R4T6TR
• Description: ARM Microcontrollers - MCU ARM Cortex M0 16kB 48 MHz CPU 8kB Flash
• Manufacturer: STMicroelectronics

Specifications of STM32F051R4T6TR

• Rohs: yes

Electrical characteristics
6.3.21
Table 64.
1. The I2C characteristics are the requirements from I2C bus specification rev03. They are guaranteed by design when
2. The maximum data hold time has only to be met if the interface does not stretch the low period of SCL signal.
3. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region
4. The device must internally provide a hold time of at least 120ns for the SDA signal in order to bridge the undefined region
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t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
su(STO)
I2Cx_TIMING register is correctly programmed (Refer to reference manual). These characteristics are not tested in
production.
of the falling edge of SCL.
of the falling edge of SCL.
t
t
t
t
su(STA)
h(SDA)
r(SDA)
h(STA)
r(SCL)
f(SDA)
f(SCL)
C
b
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition
setup time
Stop condition setup time
Stop to Start condition time
(bus free)
Capacitive load for each bus
line
Communication interfaces
I
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
summarized in
The I
the following restrictions: the I/O pins SDA and SCL are mapped to are not “true” open-
drain. When configured as open-drain, the PMOS connected between the I/O pin and V
disabled, but is still present.
The I
characteristics
and SCL) .
I
2
2
C characteristics
C interface characteristics
2
2
C interface meets the requirements of the standard I
C characteristics are described in
Parameter
for more details on the input/output alternate function characteristics (SDA
Table
(1)
20.
Standard mode
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
Doc ID 022265 Rev 3
(3)
-
-
-
3450
1000
Max
300
400
-
-
-
-
-
-
-
PCLK
Table
(2)
frequency and V
64. Refer also to
Min
100
0
1.3
0.6
0.6
0.6
0.6
1.3
Fast mode
(3)
-
-
-
Table 64
900
Max
300
300
400
2
-
-
-
-
-
-
-
C communication protocol with
(2)
are derived from tests
DD
Section 6.3.13: I/O port
supply voltage conditions
Fast Mode Plus
0.26
0.26
0.26
0.26
Min
0
0.5
0.5
50
(4)
-
-
-
450
Max
120
120
550
STM32F051x
-
-
-
-
-
-
-
(2)
Unit
DD
μs
μs
pF
µs
ns
µs
is