PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 153

• Manufacturer Part Number: PCI-MT32-XP-N1
• Description: FPGA - Field Programmable Gate Array PCI Master/Target 32B
• Manufacturer: Lattice

Specifications of PCI-MT32-XP-N1

• Factory Pack Quantity: 1

IPUG18_09.2, November 2010
This appendix gives resource utilization information for Lattice FPGAs using the PCI IP core.
IPexpress is the Lattice IP configuration utility, and is included as a standard feature of the Diamond and ispLEVER
design tools. Details regarding the usage of IPexpress can be found in the IPexpress and Diamond or ispLEVER
help system. For more information on the Diamond or ispLEVER design tools, visit the Lattice web site at:
www.latticesemi.com/software.
LatticeECP and LatticeEC FPGAs
Table A-1. Performance and Resource Utilization
Ordering Part Number
Table A-2
ticeECP/EC.
Table A-2. OPN for LatticeECP/EC PCI IP Core
Target 33 MHz, 32-bit
PCI/Local/Address bus width
Target 33 MHz, 64-bit
PCI/Local/Address bus width
Target 66 MHz, 32-bit
PCI/Local/Address bus width
Target 66 MHz, 64-bit
PCI/Local/Address bus width
Master/Target 33 MHz, 32-bit
PCI/Local/Address bus width
Master/Target 33 MHz, 64-bit
PCI/Local/Address bus width
Master/Target 66 MHz, 32-bit
PCI/Local/Address bus width
Master/Target 66 MHz, 64-bit
PCI/Local/Address bus width
1. Performance and utilization data are generated using an LFEC33E-5F672C device with Lattice Diamond 1.0 software. Performance may
vary when using a different software version or targeting a different device density or speed grade within the LatticeECP/EC 
family.
User-Configurable Mode
lists the Ordering Part Number (OPNs) for each mode of operation supported by the PCI IP core for Lat-
IPexpress
33 MHz
33 MHz
66 MHz
66 MHz
33 MHz
33 MHz
66 MHz
66 MHz
Speed
PCI Bus
SLICEs
32-bit
64-bit
32-bit
64-bit
32-bit
64-bit
32-bit
64-bit
1153
1083
1599
586
715
606
832
846
LUTs
Master/Target
Master/Target
Master/Target
Master/Target
1344
1060
1549
1690
2569
703
913
966
1
Target
Target
Target
Target
Type
153
Registers
472
594
493
614
642
849
663
869
Resource Utilization
sysMEM™
PCI-MT32-E2-U6
PCI-MT64-E2-U6
PCI-MT32-E2-U6
PCI-MT64-E2-U6
PCI-T32-E2-U6
PCI-T64-E2-U6
PCI-T32-E2-U6
PCI-T64-E2-U6
EBRs
0
0
0
0
0
0
0
0
OPN
(PCI Interface)
External Pins
PCI IP Core User’s Guide
48
87
48
87
50
89
50
89
Appendix A:
f
MAX
33
33
66
66
33
33
66
66