PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 176

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PCI-MT32-XP-N1

Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-MT32-XP-N1

Factory Pack Quantity
1
Lattice Semiconductor
Table B-9. PCI Pin Assignments (Continued)
IPUG18_09.2, November 2010
PCI Pin Assignments for Master/Target 33MHz 32-Bit Bus
The PCI Master/Target 33MHz 32-bit core is optimized for LCMXO2280C-5FT324C. An example pin assignment,
optimized for best performance, is given in
further information.
Table B-10. PCI Pin Assignments
PCI System Pins
PCI Address and Data
PCI Interface Controls
PCI Interrupts
Signal Name
Signal Name
devseln
ad(10)
ad(11)
ad(12)
ad(13)
ad(14)
ad(15)
ad(16)
cben(1)
cben(2)
cben(3)
Framen
ad(0)
ad(1)
ad(2)
ad(3)
ad(4)
ad(5)
ad(6)
ad(7)
ad(8)
ad(9)
stopn
perrn
serrn
irdyn
trdyn
intan
idsel
clk
par
Table
B-10. Refer to the readme file included with the core package for
Pin/Bank
Pin/Bank
D12 / 1
D11 / 1
C14 / 1
E10 / 1
B13 / 1
B14 / 1
E11 / 1
A15 / 1
D7 / 0
C8 / 0
A7 / 0
B8 / 0
D8 / 0
R3 / 6
C6 / 0
D7 / 0
C7 / 0
D8 / 0
C8 / 0
D9 / 1
B5 / 0
A5 / 0
E7 / 0
E8 / 0
F8 / 0
B6 / 0
A6 / 0
B7 / 0
A7 / 0
B8 / 0
A8 / 0
176
LVCMOS33_IN
Buffer Type
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
Buffer Type
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
Pin Assignments For Lattice FPGAs
PCI IP Core User’s Guide

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