MAX9263GCB/V+T Maxim Integrated, MAX9263GCB/V+T Datasheet - Page 37

• Manufacturer Part Number: MAX9263GCB/V+T
• Description: Serializers & Deserializers - Serdes GMSL Serializer w/HDCP Interface
• Manufacturer: Maxim Integrated

Figure 28. Format Conversion Between GMSL UART and I
In the event of a missed acknowledge, the FC should
assume there was an error in the packet when the slave
device receives it, or that an error occurred during the
response from the slave device. In base mode, the FC
must keep the UART Tx/Rx lines high for 16 bit-times
before starting to send a new packet.
As shown in Figure 28, the remote-side device converts
the packets going to or coming from the peripherals from
the UART format to the I
remote device removes the byte number count and adds
or receives the ACK between the data bytes of I
I
The serializer and deserializer UART-to-I
sion interfaces with devices that do not require register
addresses, such as the MAX7324 GPIO expander. In
this mode, the I
byte and directly reads/writes the subsequent data bytes
(Figure 29). Change the communication method of the
I
sets command-byte-only mode, while I2CMETHOD = 0
sets normal mode where the first byte in the data stream
is the register address.
2
2
SERIALIZER/DESERIALIZER
SERIALIZER/DESERIALIZER
C’s data rate is the same as the UART data rate.
C master using the I2CMETHOD bit. I2CMETHOD = 1
UART-TO-I
FC
UART-TO-I
FC
SYNC FRAME
SYNC FRAME
Interfacing Command-Byte-Only I
2
2
11
11
C CONVERSION OF WRITE PACKET (I2CMETHOD = 0)
C CONVERSION OF READ PACKET (I2CMETHOD = 0)
SERIALIZER/DESERIALIZER
SERIALIZER/DESERIALIZER
2
C master ignores the register address
DEVICE ID + WR
DEVICE ID + RD
11
11
PERIPHERAL
PERIPHERAL
2
C format and vice versa. The
: MASTER TO SLAVE
1
S
1
S
REGISTER ADDRESS
REGISTER ADDRESS
DEV ID
DEV ID
7
7
11
11
HDCP Gigabit Multimedia Serial
W
W
1
1
1
A
1
A
2
2
C conver-
C Devices
: SLAVE TO MASTER
REG ADDR
REG ADDR
NUMBER OF BYTES
NUMBER OF BYTES
2
C. The
8
8
Link Serializer/Deserializer
2
C with Register Address (I2CMETHOD = 0)
11
11
1
A
1
A
1
S
DEV ID
S: START
In bypass mode, the serializer/deserializer ignore UART
commands from the FC and the FC communicates with
the peripherals directly using its own defined UART pro-
tocol. The FC cannot access the serializer/deserializer’s
registers in this mode. Peripherals accessed through the
forward control channel using the UART interface need
to handle at least one PCLKIN period ±10ns of jitter due
to the asynchronous sampling of the UART signal by
PCLKIN. Set MS = high to put the control channel into
bypass mode. For applications with the FC connected to
the deserializer, (CDS is high) there is a 1ms wait time
between setting MS high and the bypass control channel
being active. There is no delay time when switching to
bypass mode when the FC is connected to the serial-
izer (CDS = low). Do not send a logic-low value longer
than 100Fs to ensure proper interrupt functionality.
Bypass mode accepts bit rates down to 10kbps in either
direction. See the Interrupt Control section for interrupt
functionality limitations. The control-channel data pattern
should not be held low longer than 100Fs if interrupt
control is used.
7
DATA 0
R
1
11
A
1
P: STOP
DATA 0
ACK FRAME
8
11
A: ACKNOWLEDGE
DATA 0
1
A
8
DATA N
A
DATA N
1
11
8
DATA 0
11
A
1
P
1
DATA N
8
ACK FRAME
11
Bypass Mode
1
A P
1
DATA N
11
37