CY7C1350G-133AXC Cypress Semiconductor Corp, CY7C1350G-133AXC Datasheet - Page 7

• Manufacturer Part Number: CY7C1350G-133AXC
• Description: IC SRAM 4.5MBIT 133MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1350G-133AXC

• Memory Size: 4.5M (128K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 4 ns
• Maximum Clock Frequency: 133 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 225 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Memory Configuration: 128K X 36
• Clock Frequency: 133MHz
• Supply Voltage Range: 3.135V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Density: 4Mb
• Access Time (max): 4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Supply Current: 225mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2116; CY7C1350G-133AXC

Truth Table
Partial Truth Table for Read/Write
ZZ Mode Electrical Characteristics
Document Number: 38-05524 Rev. *I
NOP/WRITE ABORT (begin burst) None
WRITE ABORT (continue burst)
IGNORE CLOCK EDGE (stall)
SNOOZE MODE
Read
Write no bytes written
Write byte A(DQ
Write byte B(DQ
Write bytes A, B
Write byte C (DQ
Write bytes C, A
Write bytes C, B
Write bytes C, B, A
Write byte D(DQ
Write bytes D, A
Write bytes D, B
Write bytes D, B, A
Write bytes D, C
Write bytes D, C, A
Write bytes D, C, B
Write all bytes
I
t
t
t
t
Note
DDZZ
ZZS
ZZREC
ZZI
RZZI
9. X =”Don't Care.” H = Logic HIGH, L = Logic LOW. CE stands for all chip enables active. BW x = L signifies at least one byte write select is active, BW x = valid
10. Write is defined by BW
11. Table only lists a partial listing of the byte write combinations. Any combination of BW
Parameter
signifies that the desired byte write selects are asserted, see Write Cycle Description table for details.
Operation
[2, 3, 4, 5, 6, 7, 8]
Snooze mode standby current
Device operation to ZZ
ZZ recovery time
ZZ active to snooze current
ZZ inactive to exit snooze current
A
B
C
D
and DQP
and DQP
and DQP
and DQP
X
Function
, and WE. See Write Cycle Descriptions table.
A
B
D
C
(continued)
)
Description
)
)
)
Next
Current
None
Address Used
[9, 10, 11]
ZZ > V
This parameter is sampled
ZZ > V
ZZ < 0.2 V
This parameter is sampled
CE
X
X
X
L
WE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
ZZ
DD
DD
H
L
L
L
Test Conditions
 0.2 V
 0.2 V
X
ADV/LD
is valid. Appropriate write will be done on which byte write is active.
BW
H
X
X
L
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
D
WE BW
X
X
X
L
BW
H
H
X
X
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
x
C
OE CEN
X
X
X
X
2t
Min
CYC
–
–
–
0
H
X
L
L
BW
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
CLK
B
L-H
L-H
L-H
2t
2t
X
Max
40
CYC
CYC
–
–
CY7C1350G
Tri-state
Tri-state
Tri-state
BW
DQ
—
Page 7 of 18
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
Unit
mA
ns
ns
ns
ns
A
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