ST72T213G1B6 STMicroelectronics, ST72T213G1B6 Datasheet - Page 17

• Manufacturer Part Number: ST72T213G1B6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 4K SPI
• Manufacturer: STMicroelectronics

Specifications of ST72T213G1B6

• Rohs: yes
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 5.5 V
• Package / Case: PDIP-32
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 6
• Interface Type: SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• On-chip Dac: No
• Program Memory Type: OTP EPROM
• Factory Pack Quantity: 16
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.5 V

3.2 RESET
3.2.1 Introduction
There are three sources of Reset:
– RESET pin (external source)
– Power-On Reset (Internal source)
– WATCHDOG (Internal Source)
The Reset Service Routine vector is located at ad-
dress FFFEh-FFFFh.
3.2.2 External Reset
The RESET pin is both an input and an open-drain
output with integrated pull-up resistor. When one
of the internal Reset sources is active, the Reset
pin is driven low , for a duration of t
the whole application.
3.2.3 Reset Operation
The duration of the Reset state is a minimum of
4096 internal CPU Clock cycles. During the Reset
state, all I/Os take their reset value.
A Reset signal originating from an external source
must have a duration of at least t
be recognised. This detection is asynchronous
and therefore the MCU can enter Reset state even
in Halt mode.
At the end of the Reset cycle, the MCU may be
held in the Reset state by an External Reset sig-
nal. The RESET pin may thus be used to ensure
V
ate correctly before the user program is run. Fol-
Figure 15. Reset Block Diagram
DD
has risen to a point where the MCU can oper-
RESET
V
DD
OSCILLATOR
SIGNAL
R
ON
PULSE
RESET,
in order to
to reset
TO ST7
lowing a Reset event, or after exiting Halt mode, a
4096 CPU Clock cycle delay period is initiated in
order to allow the oscillator to stabilise and to en-
sure that recovery has taken place from the Reset
state.
In the high state, the RESET pin is connected in-
ternally to a pull-up resistor (R
can be pulled low by external circuitry to reset the
device.
The RESET pin is an asynchronous signal which
plays a major role in EMS performance. In a noisy
environment, it is recommended to use the exter-
nal connections shown in
3.2.4 Power-on Reset
This circuit detects the ramping up of V
generates a pulse that is used to reset the applica-
tion (at approximately V
Power-On Reset is designed exclusively to cope
with power-up conditions, and should not be used
in order to attempt to detect a drop in the power
supply voltage.
Caution: to re-initialize the Power-On Reset, the
power supply must fall below approximately 0.8V
(Vtn), prior to rising above 2V. If this condition is
not respected, on subsequent power-up the Reset
pulse may not be generated. An external Reset
pulse may be required to correctly reactivate the
circuit.
RESET
POWER-ON RESET
WATCHDOG RESET
ST72101/ST72212/ST72213
DD
Figure
= 2V).
ON
8.
INTERNAL
RESET
). This resistor
DD
, and
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