ST72T213G1B6 STMicroelectronics, ST72T213G1B6 Datasheet - Page 23

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ST72T213G1B6

Manufacturer Part Number
ST72T213G1B6
Description
8-bit Microcontrollers - MCU OTP EPROM 4K SPI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72T213G1B6

Rohs
yes
Core
ST7
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
4 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
3 V to 5.5 V
Package / Case
PDIP-32
Mounting Style
Through Hole
A/d Bit Size
8 bit
A/d Channels Available
6
Interface Type
SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
22
Number Of Timers
1
On-chip Dac
No
Program Memory Type
OTP EPROM
Factory Pack Quantity
16
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.5 V
4.5 MISCELLANEOUS REGISTER
The Miscellaneous register allows to select the
SLOW operating mode, the polarity of external in-
terrupt requests and to output the internal clock.
Register Address: 0020h — Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = PEI[3:2] External Interrupt EI1 Polarity
Option .
These bits are set and cleared by software. They
determine which event on EI1 causes the exter-
nal interrupt according to
Table 8. EI1 External Interrupt Polarity Options
Note: Any modification of one of these two bits re-
sets the interrupt request related to this interrupt
vector.
Bit 5 = MCO Main Clock Out
This bit is set and cleared by software. When set, it
enables the output of the Internal Clock on the
PC2 I/O port.
0 - PC2 is a general purpose I/O port.
1 - MCO alternate function (f
PEI3
pin).
7
Falling edge and low level
Rising and falling edge
PEI2
Falling edge only
Rising edge only
(Reset state)
MCO PEI1 PEI0
MODE
Table
CPU
8.
is output on PC2
-
PEI3
0
1
0
1
-
PEI2
SMS
0
0
1
1
0
Bit 4:3 = PEI[1:0] External Interrupt EI0 Polarity
Option .
These bits are set and cleared by software. They
determine which event on EI0 causes the exter-
nal interrupt according to
Table 9. EI0 External Interrupt Polarity Options
Note: Any modification of one of these two bits re-
sets the interrupt request related to this interrupt
vector.
Bit 1:2 = Unused, always read at 0.
Warning: Software must write 1 to these bits for
compatibility with future products.
Bit 0 = SMS Slow Mode Select
This bit is set and cleared by software.
0- Normal mode - f
1- Slow mode - f
(Reset state)
Falling edge and low level
Rising and falling edge
Falling edge only
Rising edge only
(Reset state)
MODE
CPU
ST72101/ST72212/ST72213
CPU
= Oscillator frequency /32
= Oscillator frequency / 2
Table
9.
PEI1
0
1
0
1
PEI0
23/85
0
0
1
1
23

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