AD9683-170EBZ Analog Devices, AD9683-170EBZ Datasheet - Page 32

• Manufacturer Part Number: AD9683-170EBZ
• Description: Data Conversion IC Development Tools
• Manufacturer: Analog Devices
• Type: ADCr
• Series: AD9683r

Specifications of AD9683-170EBZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AD9683-170
• Interface Type: SPI
• Operating Supply Voltage: 1.8 V
• Description/function: Evaluation board with AD9683-170
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Current: 135 mA
• For Use With: AD9683-170

AD9683
SERIAL PORT INTERFACE (SPI)
The
specific functions or operations through a structured register
space provided inside the ADC. The SPI gives the user added
flexibility and customization, depending on the application.
Addresses are accessed via the serial port and can be written to
or read from via the port. Memory is organized into bytes that
can be further divided into fields. These fields are documented
in the Memory Map section. For detailed operational information,
see the
ADCs via SPI.
CONFIGURATION USING THE SPI
Three pins define the SPI of this ADC: the SCLK pin, the SDIO
pin, and the CS pin (see Table 15). The SCLK (serial clock) pin is
used to synchronize the read and write data presented from/to the
ADC. The SDIO (serial data input/output) pin is a dual-purpose
pin that allows data to be sent to and read from the internal ADC
memory map registers. The CS (chip select bar) pin is an active
low control that enables or disables the read and write cycles.
Table 15. Serial Port Interface Pins
Pin
SCLK
SDIO
CS
The falling edge of CS , in conjunction with the rising edge of
SCLK, determines the start of the framing. An example of the
serial timing and its definitions can be found in Figure 67 and
Table 5.
Other modes involving CS are available. CS can be held low
indefinitely, which permanently enables the device; this is called
streaming. CS can stall high between bytes to allow for additional
external timing. When CS is tied high, SPI functions are placed
in a high impedance mode. This mode turns on any SPI pin
secondary functions.
During an instruction phase, a 16-bit instruction is transmitted.
Data follows the instruction phase, and its length is determined
by the W0 and the W1 bits.
AD9683
AN-877
Function
Serial clock. The serial shift clock input, which is used to
synchronize the serial interface reads and writes.
Serial data input/output. A dual-purpose pin that
typically serves as an input or an output, depending on
the instruction being sent and the relative position in the
timing frame.
Chip select bar. An active low control that gates the read
and write cycles.
SPI allows the user to configure the converter for
Application Note, Interfacing to High Speed
Rev. 0 | Page 32 of 44
All data is composed of 8-bit words. The first bit of each individual
byte of serial data indicates whether a read or write command is
issued. This allows the SDIO pin to change direction from an
input to an output.
In addition to word length, the instruction phase determines
whether the serial frame is a read or write operation, allowing
the serial port to be used both to program the chip and to read
the contents of the on-chip memory. If the instruction is a readback
operation, performing a readback causes the SDIO pin to change
direction from an input to an output at the appropriate point in
the serial frame.
Data can be sent in MSB first mode or in LSB first mode. MSB
first is the default on power-up and can be changed via the SPI
port configuration register. For more information about this and
other features, see the
High Speed ADCs via SPI.
HARDWARE INTERFACE
The pins described in Table 15 comprise the physical interface
between the user programming device and the serial port of the
AD9683. The SCLK pin and the CS pin function as inputs when
using the SPI interface. The SDIO pin is bidirectional, functioning
as an input during write phases and as an output during readback.
The SPI interface is flexible enough to be controlled by either
FPGAs or microcontrollers. One method for SPI configuration
is described in detail in the
Microcontroller-Based Serial Port Interface (SPI) Boot Circuit.
Do not activate the SPI port during periods when the full dynamic
performance of the converter is required. Because the SCLK signal,
the CS signal, and the SDIO signal are typically asynchronous to
the ADC clock, noise from these signals can degrade converter
performance. If the on-board SPI bus is used for other devices, it
may be necessary to provide buffers between this bus and the
AD9683
converter inputs during critical sampling periods.
to prevent these signals from transitioning at the
AN-877
AN-812
Application Note, Interfacing to
Application Note,
Data Sheet