CP2401-GQ Silicon Laboratories Inc, CP2401-GQ Datasheet - Page 48

• Manufacturer Part Number: CP2401-GQ
• Description: IC LCD DRIVER 48TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2401-GQ

• Package / Case: 48-TQFP, 48-VQFP
• Display Type: LCD
• Configuration: 128 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1860

CP2400/1/2/3
8.2.
During power-up, the CP2400/1/2/3 is held in the reset state until V
occurs between the time V
the Electrical Characteristics of the power-on reset circuit.
8.3.
The RST pin provides a means for external circuitry to force the CP2400/1/2/3 into a reset state. Asserting RST for
at least T
driver or add an external pull-up resistor to avoid erroneous noise-induced resets. The CP2400/1/2/3 will exit the
reset state and generate a Reset Complete Interrupt approximately one T
detected on RST. Refer to Table 3.3 on page 16 for the Electrical Characteristics.
48
Power-On Reset
External Pin Reset
RST
will cause the CP2400/1/2/3 to enter the reset state. It is recommended to drive RST with a push-pull
Logic HIGH
Logic LOW
1.0
V
DD
RST
reaches V
/RST
RST
Figure 8.1. Reset Timing
and the time the device is released from reset. Refer to Table 3.3 for
Power-On
Rev. 1.0
Reset
T
PORDelay
DD
settles above V
VDD
STARTUP
t
delay after a logic high is
RST
. A delay (T
PORDelay
)