CP2401-GQ Silicon Laboratories Inc, CP2401-GQ Datasheet - Page 71

• Manufacturer Part Number: CP2401-GQ
• Description: IC LCD DRIVER 48TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2401-GQ

• Package / Case: 48-TQFP, 48-VQFP
• Display Type: LCD
• Configuration: 128 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1860

11.1.2. Using RTCADR and RTCDAT to Access SmaRTClock Internal Registers
The SmaRTClock internal registers can be read and written using RTCADR and RTCDAT. The RTCADR register
selects the SmaRTClock internal register that will be targeted by subsequent reads or writes.
A SmaRTClock Write operation is initiated by writing to the RTCDAT register. Below is an example of writing to a
SmaRTClock internal register.
A SmaRTClock Read operation is initiated by setting the SmaRTClock Interface Busy bit. This transfers the
contents of the internal register selected by RTCADR to RTCDAT. The transferred data will remain in RTCDAT until
the next read or write operation. Below is an example of reading a SmaRTClock internal register.
11.1.3. SmaRTClock Interface Autoread Feature
When Autoread is enabled, each read from RTCDAT initiates the next indirect read operation on the SmaRTClock
internal register selected by RTCADR. Software should set the BUSY bit once at the beginning of each series of
consecutive reads. Software must check if the SmaRTClock Interface is busy prior to reading RTCDAT. Autoread is
enabled by setting AUTORD (RTCADR.6) to logic 1.
11.1.4. RTCADR Autoincrement Feature
For ease of reading and writing the 32-bit CAPTURE and ALARM values, RTCADR automatically increments after
each read or write to a CAPTUREn or ALARMn register. This speeds up the process of setting an alarm or reading
the current SmaRTClock timer value by allowing all 4 CAPTURE or ALARM registers to be read or written in a
single block write. Autoincrement is always enabled.
Notes: Autoincrement should only be used with block reads/writes. When using single-byte reads/writes, RTCADR must be
written before each data read or write.
When using SMBus to perform a block read/write, the RTCADR register must be written using the REGSET command.
1. Write 0x05 to RTCADR. This selects the internal RTC0CN register at SmaRTClock Address 0x05.
2. Write 0x00 to RTCDAT. This operation writes 0x00 to the internal RTC0CN register.
1. Write 0x05 to RTCADR. This selects the internal RTC0CN register at SmaRTClock Address 0x05.
2. Write 1 to BUSY. This initiates the transfer of data from RTC0CN to RTCDAT. Note: Step 1 and Step 2
3. Read data from RTCDAT. This data is a copy of the RTC0CN register.
may be combined into a single write.
Rev. 1.0
CP2400/1/2/3
71