MIC2584-JBTS Micrel Inc, MIC2584-JBTS Datasheet - Page 15

IC CTRLR HOT SWAP DUAL 16-TSSOP

MIC2584-JBTS

Manufacturer Part Number
MIC2584-JBTS
Description
IC CTRLR HOT SWAP DUAL 16-TSSOP
Manufacturer
Micrel Inc
Type
Hot-Swap Controllerr
Datasheet

Specifications of MIC2584-JBTS

Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
1 V ~ 13.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Linear Misc Type
Positive Low Voltage
Family Name
MIC2584
Package Type
TSSOP
Operating Supply Voltage (min)
1V
Operating Supply Voltage (max)
13.2V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Height (mm)
0.9mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MIC2584-JBTS
Manufacturer:
MIC
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Manufacturer:
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Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system backplanes
and supply voltages, high inrush currents can result due to
the charging of bulk capacitance that resides across the
supply pins of the circuit board. This inrush current, although
transient in nature, may be high enough to cause permanent
damage to on-board components or may cause the system’s
supply voltages to go out of regulation during the transient
period which may result in system failures. The MIC2584 and
MIC2585 act as a controller for external N-Channel MOSFET
devices in which the gate drive is controlled to provide inrush
current limiting and output voltage slew rate control during hot
swap insertions.
Power Supply
VCC1 is the main supply input to the MIC2584/85 controller
with a voltage range of 2.3V to 13.2V. The VCC2 supply input
ranges from 1.0V to 13.2V and must be less than or equal to
VCC1 for operation. Both inputs can withstand transient
spikes up to 20V. In order to ensure stability of the supplies,
a minimum 1 F capacitor from each VCC to ground is
recommended. Alternatively, a low pass filter, shown in the
typical application circuit, can be used to eliminate high
frequency oscillations as well as help suppress transient
spikes.
Also, due to the existence of undetermined parasitic induc-
tance in the absence of bulk capacitance, placing a Zener
diode at each VCC of the controller to ground in order to
provide external supply transient protection is strongly rec-
ommended. See the typical application circuit in Figure 1.
Start-Up Cycle
Supply Contact Delay
During a hot insert of a PC board into a backplane or when the
main supply (VCC1) is powered up from a cold start, as the
voltage at the ON pin rises above its threshold (1.235V
typical), the MIC2584/85 first checks that both supply volt-
ages are above their respective UVLO thresholds. If so, then
the device is enabled and an internal 2.5 A current source
begins charging capacitor C
sequence. Once the start-up delay (t
CPOR pin is pulled immediately to ground and a separate
14 A current source begins charging each GATE output to
drive the external MOSFET that switches V
programmed contact start-up delay is calculated using the
following equation:
where the start-up delay timer threshold (V
and the Power-On Reset timer current (I
Table 2 for some typical supply contact start-up delays using
several standard value capacitors. As each GATE voltage
continues ramping toward its final value (V
defined slew rate (See Load Capacitance/Gate Capacitance
Dominated Start-Up sections), a second CPOR timing cycle
begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not an
overvoltage, undervoltage lockout, or overcurrent state).
March 2005
MIC2584/2585
t
START
C
POR
V
I
START
CPOR
POR
to 0.3V to initiate a start-up
0.12 C
START
CPOR
POR
IN
START
CC
) elapses, the
) is 2.5 A. See
to V
( F)
+ V
OUT
) is 0.3V,
GS
(1)
. The
) at a
15
This second timing cycle (t
voltage exceeds its FB pin threshold (V
the "
present (i.e., not a “hot swapping” condition) and the MIC2584/
85 device is enabled by applying a logic high signal at the ON
pin, the GATE outputs begin ramping immediately as the first
CPOR timing cycle is bypassed. Active current regulation is
employed to limit the inrush current transient response during
start-up by regulating the load current at the programmed
current limit value (See "
Circuit Breaker
determine the nominal current limit value:
where V
in the electrical table and R
will set the desired current limit. There are two basic start-up
modes for the MIC2584/85: 1)Start-up dominated by load
capacitance and 2)start-up dominated by total gate capaci-
tance. The magnitude of the inrush current delivered to the
load will determine the dominant mode. If the inrush current
is greater than the programmed current limit (I
capacitance is dominant. Otherwise, gate capacitance is
dominant. The expected inrush current may be calculated
using the following equation:
where I
load capacitance, and C
(C
connected from the MIC2584/85 GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance (C
cause the inrush current to exceed the programmed current
limit but is less than the fast-trip threshold (or the fast-trip
threshold is disabled, ‘M’ option). During start-up under this
condition, the load current is regulated at the programmed
current limit value (I
voltage rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
where I
quently, the value of C
the overcurrent response time, t
needed for the output to reach its final value. For example,
given a MOSFET with an input capacitance C
2000pF, C
input, then the load capacitance dominates as determined by
the calculated INRUSH > I
slew rate determined from Equation 4 is:
Output Voltage Slew Rate, (dV
ISS
Timing Diagrams
I
INRUSH I
of the external MOSFET and any external capacitor
Output Voltage Slew Rate dV
LIM
GATE
LIM
TRIPSLOW
LOAD
is the programmed current limit value. Conse-
V
is the GATE pin pull-up current, C
TRIPSLOW
R
" section). The following equation is used to
SENSE
is 1000 F, and I
GATE
is the current limit slow trip threshold found
LIM
FILTER
". When the power supply is already
) and held constant until the output
GATE
C
C
R
Current Limiting and Dual-Level
LIM
LOAD
GATE
50mV
SENSE
SENSE
POR
must be selected to ensure that
. Therefore, the output voltage
is the total GATE capacitance
) begins when the lagging
,
OCSLOW
LIM
OUT
is the selected value that
14 A
OUT
LOAD
is set to 5A with a 12V
/dt)
FB
/dt
) is large enough to
, exceeds the time
). See Figure 4 in
C
C
100 F
LOAD
GATE
MIC2584/2585
C
5A
LIM
ISS
I
LOAD
LIM
LOAD
), then load
= C
(2)
(3)
5
GATE
Micrel
ms
is the
(4)
V
=

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