ISL6622IBZ Intersil, ISL6622IBZ Datasheet

ISL6622IBZ

Manufacturer Part Number

ISL6622IBZ

Description

IC MOSFET DRVR SYNC BUCK 8-SOIC

Manufacturer

Intersil

Datasheet

1.ISL6622CRZ-T.pdf (12 pages)

Specifications of ISL6622IBZ

Configuration

High and Low Side, Synchronous

Input Type

PWM

Delay Time

20ns

Current - Peak

1.25A

Number Of Configurations

Number Of Outputs

High Side Voltage - Max (bootstrap)

36V

Voltage - Supply

6.8 V ~ 13.2 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

8-SOIC (3.9mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current page: 1 of 12
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VR11.1 Compatible Synchronous

Rectified Buck MOSFET Drivers

The ISL6622 is a high frequency MOSFET driver designed to

drive upper and lower power N-Channel MOSFETs in a

synchronous rectified buck converter topology. The advanced

PWM protocol of ISL6622 is specifically designed to work

with Intersil VR11.1 controllers and combined with

N-Channel MOSFETs, form a complete core-voltage regulator

solution for advanced microprocessors. When ISL6622

detects a PSI protocol sent by an Intersil VR11.1 controller, it

activates Diode Emulation (DE) and Gate Voltage

Optimization Technology (GVOT) operation; otherwise, it

operates in normal Continuous Conduction Mode (CCM)

PWM mode.

In the 8 Ld SOIC package, the ISL6622 drives the upper and

lower gates to VCC during normal PWM mode, while the

lower gate drops down to a fixed 5.75V (typically) during PSI

mode. The 10 Ld DFN part offers more flexibility: the upper

gate can be driven from 5V to 12V via the UVCC pin, while the

lower gate has a resistor-selectable drive voltage of 5.75V,

6.75V, and 7.75V (typically) during PSI mode. This provides

the flexibility necessary to optimize applications involving

trade-offs between gate charge and conduction losses.

To further enhance light load efficiency, the ISL6622 enables

diode emulation operation during PSI mode. This allows

Discontinuous Conduction Mode (DCM) by detecting when

the inductor current reaches zero and subsequently turning

off the low side MOSFET to prevent it from sinking current.

An advanced adaptive shoot-through protection is integrated

to prevent both the upper and lower MOSFETs from

conducting simultaneously and to minimize dead time. The

ISL6622 has a 20kΩ integrated high-side gate-to-source

resistor to prevent self turn-on due to high input bus dV/dt.

This driver also has an overvoltage protection feature

operational while VCC is below the POR threshold: the

PHASE node is connected to the gate of the low side

MOSFET (LGATE) via a 10kΩ resistor, limiting the output

voltage of the converter close to the gate threshold of the low

side MOSFET, dependent on the current being shunted,

which provides some protection to the load should the upper

MOSFET(s) become shorted.

Data Sheet

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Dual MOSFET Drives for Synchronous Rectified Bridge

• Advanced Adaptive Zero Shoot-through Protection

• Integrated LDO for Selectable Lower Gate Drive Voltage

• 36V Internal Bootstrap Diode

• Advanced PWM Protocol (Patent Pending) to Support PSI

• Diode Emulation for Enhanced Light Load Efficiency

• Bootstrap Capacitor Overcharging Prevention

• Supports High Switching Frequency

• Integrated High-Side Gate-to-Source Resistor to Prevent

• Pre-POR Overvoltage Protection for Start-up and

• Power Rails Undervoltage Protection

• Expandable Bottom Copper Pad for Enhanced Heat

• Dual Flat No-Lead (DFN) Package

• Pb-Free (RoHS Compliant)

Applications

• High Light Load Efficiency Voltage Regulators

• Core Regulators for Advanced Microprocessors

• High Current DC/DC Converters

• High Frequency and High Efficiency VRM and VRD

Related Literature

• Technical Brief TB363 “Guidelines for Handling and

• Technical Brief TB417 “Designing Stable Compensation

(5.75V, 6.75V, 7.75V) to Optimize Light Load Efficiency

Mode, Diode Emulation, Three-State Operation

- 3A Sinking Current Capability

- Fast Rise/Fall Times and Low Propagation Delays

from Self Turn-On due to High Input Bus dV/dt

Shutdown

Sinking

- Near Chip-Scale Package Footprint; Improves PCB

Processing Moisture Sensitive Surface Mount Devices

(SMDs)”

Networks for Single Phase Voltage Mode Buck

Regulators” for Power Train Design, Layout Guidelines,

and Feedback Compensation Design

Efficiency and Thinner in Profile

October 30, 2008

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

ISL6622

FN6470.2

Related parts for ISL6622IBZ

ISL6622IBZ Summary of contents

Page 1

... Feedback Compensation Design CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6622 ...

Page 2

... ISL6622CBZ* 6622 CBZ ISL6622CRZ* 622Z ISL6622IBZ* 6622IBZ ISL6622IRZ* 622I *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 3

Typical Application Circuit +5V COMP VCC FB VDIFF VSEN PWM1 RGND ISEN1- EN_VTT VTT ISEN1+ VR_RDY VID7 ISL6334 VID6 VID5 VID4 PWM2 VID3 VID2 ISEN2- VID1 ISEN2+ VID0 PSI PWM3 VR_FAN ISEN3- VR_HOT ISEN3+ VIN EN_PWR GND PWM4 IMON ISEN4- ...

Page 4

... LVCC to 15V DC DC <36V) BOOT-GND Recommended Operating Conditions Ambient Temperature Range ISL6622IBZ, ISL6622IRZ . . . . . . . . . . . . . . . . . . . .-40°C to +85°C ISL6622CBZ, ISL6622CRZ . . . . . . . . . . . . . . . . . . . 0°C to +70°C Maximum Operating Junction Temperature +125°C Supply Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.8V to 13.2V UVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V to 13.2V SYMBOL TEST CONDITIONS I ISL6622CBZ and ISL6622IBZ, ...

Page 5

Electrical Specifications Recommended Operating Conditions. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested (Continued) PARAMETER Three-State Upper Gate Falling Threshold (Note 4) UGATE Rise ...

Page 6

... MOSFET due to high dV/dt of the switching node. Advanced PWM Protocol (Patent Pending) The advanced PWM protocol of ISL6622 is specifically designed to work with Intersil VR11.1 controllers. When ISL6622 detects a PSI protocol sent by an Intersil VR11.1 controller, it turns on diode emulation and GVOT (described in next sections) operation; otherwise, it remains in normal ] is FL CCM PWM mode ...

Page 7

Gate Voltage Optimization Technology (GVOT) The ISL6622 provides the user flexibility in choosing the gate drive voltage for efficiency optimization. During light load operation, the switching losses dominate system performance. Dropping down to a lower drive voltage with GVOT during ...

Page 8

Pre-POR Overvoltage Protection While VCC is below its POR level, the upper gate is held low and LGATE is connected to the PHASE pin via an internal 10kΩ (typically) resistor. By connecting the PHASE node to the gate of the ...

Page 9

The total gate drive power losses are dissipated among the resistive components along the transition path, as outlined in Equation 4. The drive resistance dissipates a portion of the total gate drive power losses, the rest will be dissipated by ...

Page 10

... SOIC DFN 10 ISL6622 Gate Drive Voltage Options Intersil provides various gate drive voltage options in the ISL6622 product family, as shown in Table 2. The ISL6622 can drop the low-side MOSFET’s gate drive voltage when operating in DEM, while the high-side FET’s VIN gate drive voltage of the DFN package can be connected to D VCC or LVCC ...

Page 11

... The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide NX b improved electrical and thermal performance Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 0. 0.200 ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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