IR3503MTRPBF International Rectifier, IR3503MTRPBF Datasheet - Page 12

IC CTRL XPHASE VR11.0/1 32-MLPQ

IR3503MTRPBF

Manufacturer Part Number
IR3503MTRPBF
Description
IC CTRL XPHASE VR11.0/1 32-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3503MTRPBF

Applications
Processor
Current - Supply
8mA
Voltage - Supply
4.75 V ~ 7.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
*
Package
32-Lead MLPQ
Circuit
X-Phase Control IC
Switch Freq (khz)
250kHz to 1.5MHz
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3503MTRPBFTR
PWM Operation
The PWM comparator is located in the phase IC. With the PHSIN voltage high, upon receiving the falling edge of a
clock pulse, the PWM latch is set. The PWMRMP voltage begins to increase; the low side driver is turned off, and the
high side driver is turned on after the non-overlap time. When the PWMRMP voltage exceeds the error amplifier’s
output voltage, the PWM latch is reset. This turns off the high side driver and then turns on the low side driver after the
non-overlap time. Along with that, it activates the ramp discharge clamp, which quickly discharges the PWMRMP
capacitor to the output voltage of share adjust amplifier in phase IC until the next clock pulse.
The PWM latch is reset dominant allowing all phases to go to zero duty cycle within a few tens of nanoseconds in
response to a load step decrease. Phases can overlap and go up to 100% duty cycle in response to a load step
increase with turn-on gated by the clock pulses. An error amplifier output voltage greater than the common mode input
range of the PWM comparator results in 100% duty cycle regardless of the voltage of the PWM ramp. This
arrangement guarantees the error amplifier is always in control and can demand 0 to 100% duty cycle as required. It
also favors response to a load step decrease which is appropriate, given the low output to input voltage ratio of most
systems. The inductor current will increase much more rapidly than decrease in response to load transients. The error
amplifier is a high speed amplifier with wide bandwidth and fast slew rate incorporated in the control IC. It is not unity
gain stable.
This control method is designed to provide “single cycle transient response,” where the inductor current changes in
response to load transients within a single switching cycle maximizing the effectiveness of the power train and
minimizing the output capacitor requirements. An additional advantage of the architecture is that differences in the
ground or input voltage at the phases have no effect on operation since the PWM ramps are referenced to VDAC.
Figure 6 depicts PWM operating waveforms under various conditions.
Body Braking
In a conventional synchronous buck converter, the minimum time required to reduce the current in the inductor in
response to a load step decrease is;
The slew rate of the inductor current can be significantly increased by turning off the synchronous rectifier in response
to a load step decrease. The switch node voltage is then forced to decrease until conduction of the synchronous
rectifier’s body diode occurs. This increases the voltage across the inductor from Vout to Vout + V
minimum time required to reduce the current in the inductor in response to a load transient decrease is now;
PHASE IC
CLOCK
PULSE
PWMRMP
GATEH
GATEL
Page 12 of 39
EAIN
VDAC
TM
STEADY-STATE
OPERATION
DUTY CYCLE INCREASE
DUE TO LOAD
INCREASE
Figure 7: PWM Operating Waveforms
T
SLEW
=
L
DUTY CYCLE DECREASE
DUE TO VIN INCREASE
(FEED-FORWARD)
( *
I
MAX
V
O
I
MIN
)
DUTY CYCLE DECREASE DUE TO LOAD
DECREASE (BODY BRAKING) OR FAULT
(VCCLUV, OCP, VID=11111X)
February 12, 2010
IR3503
BODYDIODE
STEADY-STATE
OPERATION
. The

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