ISL62383HRTZ Intersil, ISL62383HRTZ Datasheet - Page 19

• Manufacturer Part Number: ISL62383HRTZ
• Description: IC PWR SUPPLY CONTROLLER 28TQFN
• Manufacturer: Intersil

Specifications of ISL62383HRTZ

• Applications: Power Supply Controller
• Voltage - Supply: 5.5 V ~ 25 V
• Current - Supply: 150µA
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -

and Equation 21:
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled
to reduce the total ESR until the required V
The inductance of the capacitor can cause a brief voltage dip
if the load transient has an extremely high slew rate. Low
inductance capacitors should be considered in this scenario.
A capacitor dissipates heat as a function of RMS current and
frequency. Be sure that I
of paralleled capacitors so that they operate below the
maximum rated RMS current at F
the rated value of a capacitor can fade as much as 50% as
the DC voltage across it increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and capable of
supplying the RMS current required by the switching circuit.
Their voltage rating should be at least 1.25 times greater
than the maximum input voltage, while a voltage rating of 1.5
times is a preferred rating. Figure 28 is a graph of the input
capacitor RMS ripple current, normalized relative to output
load current, as a function of duty cycle and is adjusted for
converter efficiency. The normalized RMS ripple current
calculation is written as Equation 22:
Where:
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
ΔV
I
C
- I
- k is a multiplier (0 to 1) corresponding to the inductor
- D is the duty cycle that is adjusted to take into account
IN
C
D
(
peak-to-peak ripple amplitude expressed as a
percentage of I
the efficiency of the converter which is written as:
MAX
=
RMS NORMALIZED
=
-------------------------------
8 C
•
------------------------- -
V
,
is the maximum continuous I
IN
V
I
O
PP
OUT
⋅
•
EFF
F
SW
MAX
)
=
P-P
(0% to 100%)
I
---------------------------------------------------------------------- -
MAX
is shared by a sufficient quantity
19
⋅
SW
D
⋅
I
. Take into account that
MAX
(
1 D
LOAD
–
P-P
)
+
ISL62381, ISL62382, ISL62383
D k
--------------
of the converter
12
is achieved.
⋅
2
(EQ. 21)
(EQ. 22)
(EQ. 23)
MOSFET Selection and Considerations
Typically, a MOSFET cannot tolerate even brief excursions
beyond their maximum drain to source voltage rating. The
MOSFETs used in the power stage of the converter should
have a maximum V
upper voltage tolerance of the input power source and the
voltage spike that occurs when the MOSFET switches off.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred
high-side MOSFET emphasizes low gate charge so that the
device spends the least amount of time dissipating power in
the linear region. Unlike the low-side MOSFET which has the
drain-source voltage clamped by its body diode during turn
off, the high-side MOSFET turns off with a V
approximately V
preferred low-side MOSFET emphasizes low r
fully saturated to minimize conduction loss. It should be
noted that this is an optimal configuration of MOSFET
selection for low duty cycle applications (D < 50%). For
higher output, low input voltage solutions, a more balanced
MOSFET selection for high- and low-side devices may be
warranted.
For the low-side (LS) MOSFET, the power loss can be
assumed to be conductive only and is written as Equation 24:
For the high-side (HS) MOSFET, the its conduction loss is
written as Equation 25:
For the high-side MOSFET, the switching loss is written as
Equation 26:
P
P
P
FIGURE 28. NORMALIZED RMS INPUT CURRENT @ EFF = 1
CON_LS
CON_HS
SW_HS
0.48
0.36
0.24
0.12
0.6
0
0
=
≈
0.1
=
I
V
---------------------------------------------------------------- -
LOAD
I
IN
LOAD
0.2
•
I
IN
VALLEY
2
2
r ⋅
- V
DS
•
0.3
DS ON
r
DS ON
2
OUT
rating that exceeds the sum of the
(
k = 1
k = 0.75
k = 0.5
(
k = 0.25
k = 0
•
0.4
t
ON
, plus the spike across it. The
DUTY CYCLE
)_LS
)_HS
•
f
0.5
SW
•
(
•
1 D
D
+
–
0.6
V
------------------------------------------------------------ -
IN
)
•
I
0.7
PEAK
DS
2
•
DS(ON)
0.8
t
of
OFF
August 7, 2008
0.9
•
(EQ. 26)
(EQ. 24)
(EQ. 25)
f
SW
FN6665.4
when
1.0