ISL6504CBN Intersil, ISL6504CBN Datasheet - Page 9

• Manufacturer Part Number: ISL6504CBN
• Description: IC MULTIPLE POWER CTRLR 16-SOIC
• Manufacturer: Intersil

Specifications of ISL6504CBN

• Applications: Power Supply Controller/Monitor
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 17mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Input: -

Soft-Start into Sleep States (S3, S4/S5)
The 5V
internal 10µA current source charges an external capacitor.
The error amplifiers reference inputs are clamped to a level
proportional to the SS (soft-start) pin voltage. As the SS pin
voltage slews from about 1.25V to 2.5V, the input clamp
allows a rapid and controlled output voltage rise.
Figures 7 (ISL6504) and 8 (ISL6504A) show the soft-start
sequence for the typical application start-up into a sleep
state. At time T0 5V
T1, the 5V
circuit quickly raises the SS capacitor voltage to
approximately 1V, then the 10µA current source continues
the charging.
0V
0V
FIGURE 7. SOFT-START INTERVAL IN A SLEEP
T0
VOLTAGES
SB
OUTPUT
(1V/DIV)
T1 T2
SB
POR function initiates the soft-start sequence. An
VOUT3 (3.3VDUAL/3.3VSB)
(1V/DIV)
surpasses POR level. An internal fast charge
5VSB
STATE; ISL6504
VOUT1 (1.5VSB)
SB
T3
(bias) is applied to the circuit. At time
SOFT-START
TIME
(1V/DIV)
9
T4
VOUT4 (5VDUAL) if S5
T5
VOUT4 (5VDUAL) IF S3
(1.2VVID)
VOUT2
ISL6504, ISL6504A
The soft-start capacitor voltage reaches approximately
1.25V at time T2, at which point the 3.3V
1.5V
transition, resulting in the output voltages ramping up
proportionally. The ramp-up continues until time T3 when the
two voltages reach the set value. As the soft-start capacitor
voltage reaches approximately 2.75V, the undervoltage
monitoring circuit of this output is activated and the soft-start
capacitor is quickly discharged to approximately 1.25V.
Following the 3ms (typical) time-out between T3 and T4, the
soft-start capacitor commences a second ramp-up designed
to smoothly bring up the remainder of the voltages required
by the system. At time T5, voltages are within regulation
limits, and as the SS voltage reaches 2.75V, all the
remaining UV monitors are activated and the SS capacitor is
quickly discharged to 1.25V, where it remains until the next
transition. As the 1.2V
active state, it does not come up, but rather waits until the
main ATX outputs come up within regulation limits.
Soft-Start into Active States (S0, S1)
If both S3 and S5 are logic high at the time the 5V
applied, the ISL6504/A will assume active state wake-up and
keep off the required outputs until some time (typically
25ms) after the monitored main ATX output (3.3V) exceeds
the set threshold. This time-out feature is necessary in order
to ensure the main ATX outputs are stabilized. The time-out
also assures smooth transitions from sleep into active when
sleep states are being supported. 3.3V
1.5V
surpasses POR level.
0V
0V
FIGURE 8. SOFT-START INTERVAL IN A SLEEP
SB
SB
T0
VOLTAGES
OUTPUT
(1V/DIV)
outputs will come up right after bias voltage
error amplifiers’ reference inputs start their
T1 T2
VOUT3 (3.3VDUAL/3.3VSB)
(1V/DIV)
STATE; ISL6054A
5VSB
VOUT1 (1.5VSB)
T3
VID
TIME
SOFT-START
output is only active while in an
(1V/DIV)
T4
T5
DUAL
VOUT4 (5VDUAL)
DUAL
/3.3V
/3.3V
SB
(1.2VVID)
SB
April 13, 2004
VOUT2
SB
and
is
FN9062.2
and