ISL6505CB-T Intersil, ISL6505CB-T Datasheet - Page 9

• Manufacturer Part Number: ISL6505CB-T
• Description: IC MULTIPLE POWER CTRLR 20-SOIC
• Manufacturer: Intersil

Specifications of ISL6505CB-T

• Applications: Power Supply Controller/Monitor
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 6mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Input: -

Soft-Start into Sleep States (S3, S4/S5)
The 5V
internal 10µA current source charges an external capacitor.
The error amplifiers’ reference inputs are clamped to a level
proportional to the SS (soft-start) pin voltage. As the SS pin
voltage slews from about 1.4V to 3.0V, the input clamp
allows a rapid and controlled output voltage rise.
Figures 7 (EN5 = low) and 8 (EN5 = high) show the soft-start
sequence for the typical application start-up into a sleep
state. At time T0 5V
T1, the 5V
circuit quickly raises the SS capacitor voltage to
approximately 1V, then the 10µA current source continues
the charging.
0V
0V
FIGURE 7. SOFT-START INTERVAL IN A SLEEP STATE; EN5
T0
VOLTAGES
OUTPUT
SB
(1V/DIV)
T1 T2
SB
POR function initiates the soft-start sequence. An
V
(1V/DIV)
OUT3
surpasses POR level. An internal fast charge
5V
= GND; LAN = 5V/OPEN
SB
(3.3V
SB
T3
DUAL
V
(bias) is applied to the circuit. At time
OUT1
SOFT-START
TIME
(1V/DIV)
/3.3V
9
T4
SB
V
)
OUT4
T5
(5V
V
OUT4
DUAL
(5V
) if S5
DUAL
) if S3
(1.2V
V
OUT2
VID
)
ISL6505
0V
0V
The soft-start capacitor voltage reaches approximately 1.4V
at time T2, at which point the 3.3V
error amplifiers’ reference inputs start their transition,
resulting in the output voltages ramping up proportionally.
The ramp-up continues until time T3 when the two voltages
reach the set value. As the soft-start capacitor voltage
reaches approximately 3.0V, the undervoltage monitoring
circuit of this output is activated and the soft-start capacitor
is quickly discharged to approximately 1.4V. Following the
3ms (typical) time-out between T3 and T4, the soft-start
capacitor commences a second ramp-up designed to
smoothly bring up the remainder of the voltages required by
the system. At time T5, voltages are within regulation limits,
and as the SS voltage reaches 3.0V, all the remaining UV
monitors are activated and the SS capacitor is quickly
discharged to 1.4V, where it remains until the next transition.
As the 1.2V
does not come up, but rather waits until the main ATX
outputs come up within regulation limits.
Note that in Figures 7 and 8, LAN = 5V/open. If the LAN pin
is connected to GND instead, then the V
not turn on at all in either sleep mode (S3 or S4/S5).
Soft-Start into Active States (S0, S1)
If both S3 and S5 are logic high at the time the 5V
applied, the ISL6505 will assume active state wake-up and
keep off the required outputs until some time (typically 50ms)
after the monitored main ATX outputs (3.3V and 5V; 12V is
not monitored here) exceed the set thresholds. This time-out
feature is necessary in order to ensure the main ATX outputs
are stabilized. The time-out also assures smooth transitions
from sleep into active when sleep states are being
FIGURE 8. SOFT-START INTERVAL IN A SLEEP STATE;
T0
VOLTAGES
OUTPUT
(1V/DIV)
T1 T2
V
VID
(1V/DIV)
OUT3
5V
EN5 = 5V/OPEN; LAN = 5V/OPEN
SB
output is only on while in an active state, it
(3.3V
T3
DUAL
V
OUT1
SOFT-START
TIME
(1V/DIV)
/3.3V
T4
SB
)
DUAL
T5
V
/3.3V
OUT1
OUT4
SB
(5V
output does
DUAL
and V
(1.2V
V
SB
OUT2
)
VID
is
OUT1
)