ISL6552CB Intersil, ISL6552CB Datasheet - Page 10

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ISL6552CB

Manufacturer Part Number
ISL6552CB
Description
IC PWM CORE VOLTAGE REG 20-SOIC
Manufacturer
Intersil
Datasheet

Specifications of ISL6552CB

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
1.5MHz
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Frequency-max
1.5MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Duty Cycle
-

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Figure 3 shows the start-up sequence as initiated by a fast
rising 5V supply, VCC
short rise to the three state level in PWM 1 output during first
32 PWM cycles.
Figure 4 shows the waveforms when the regulator is
operating at 200kHz. Note that the Soft-Start duration is a
function of the channel frequency as explained previously.
Also note the pulses on the COMP terminal. These pulses
are the current correction signal feeding into the comparator
input (see the Block Diagram).
Figure 5 shows the regulator operating from an ATX supply.
In this figure, note the slight rise in PGOOD as the 5V supply
rises. The PGOOD output stage is made up of NMOS and
PMOS transistors. On the rising VCC, the PMOS device
becomes active slightly before the NMOS transistor pulls
“down”, generating the slight rise in the PGOOD voltage.
FIGURE 3. START-UP OF 4 PHASE SYSTEM OPERATING AT
FIGURE 4. START-UP OF 4 PHASE SYSTEM OPERATING AT
DELAY TIME
500kHz
200kHz
DELAY TIME
,
applied to the ISL6552. Note the
10
V
IN
V
IN
= 12V
= 12V
PWM 1
OUTPUT
PGOOD
V
5V
VCC
V COMP
PGOOD
V
5V
VCC
CORE
CORE
ISL6552
Note that Figure 5 shows the 12V gate driver voltage
available before the 5V supply to the ISL6552 has reached
its threshold level. If conditions were reversed and the 5V
supply was to rise first, the start-up sequence would be
different. In this case the ISL6552 will sense an over-current
condition due to charging the output capacitors. The supply
will then restart and go through the normal Soft-Start cycle.
Fault Protection
The ISL6552 protects the microprocessor and the entire
power system from damaging stress levels. Within the
ISL6552 both Over-Voltage and Over-Current circuits are
incorporated to protect the load and regulator.
Over-Voltage
The VSEN pin is connected to the microprocessor CORE
voltage. A CORE over-voltage condition is detected when
the VSEN pin goes more than 15% above the programmed
VID level.
The over-voltage condition is latched, disabling normal PWM
operation, and causing PGOOD to go low. The latch can
only be reset by lowering and returning VCC high to initiate a
POR and Soft-Start sequence.
During a latched over-voltage, the PWM outputs will be
driven either low or three state, depending upon the VSEN
input. PWM outputs are driven low when the VSEN pin
detects that the CORE voltage is 15% above the
programmed VID level. This condition drives the PWM
outputs low, resulting in the lower or synchronous rectifier
MOSFETs to conduct and shunt the CORE voltage to
ground to protect the load.
If after this event, the CORE voltage falls below the over-
voltage limit (plus some hysteresis), the PWM outputs will
three state. The HIP6601 family drivers pass the three state
information along, and shuts off both upper and lower
MOSFETs. This prevents “dumping” of the output capacitors
back through the lower MOSFETs, avoiding a possibly
FIGURE 5. SUPPLY POWERED BY ATX SUPPLY
ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN”
V
IN
= 5V, CORE LOAD CURRENT = 31A
FREQUENCY 200kHz
12V ATX
SUPPLY
PGOOD
V
5 V ATX
SUPPLY
CORE

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