ISL6552CB Intersil, ISL6552CB Datasheet - Page 8

• Manufacturer Part Number: ISL6552CB
• Description: IC PWM CORE VOLTAGE REG 20-SOIC
• Manufacturer: Intersil

Specifications of ISL6552CB

• Pwm Type: Controller
• Number Of Outputs: 1
• Frequency - Max: 1.5MHz
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Frequency-max: 1.5MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Duty Cycle: -

Operation
Figure 1 shows a simplified diagram of the voltage regulation
and current control loops. Both voltage and current feedback
are used to precisely regulate voltage and tightly control
output currents, I
voltage loop comprises the error amplifier, comparators, gate
drivers and output MOSFETs. The error amplifier is
essentially connected as a voltage follower that has as an
input, the programmable reference DAC and an output that is
the CORE voltage.
Voltage Loop
Feedback from the CORE voltage is applied via resistor R
to the inverting input of the error amplifier. This signal can
drive the error amplifier output either high or low, depending
upon the CORE voltage. Low CORE voltage makes the
amplifier output move towards a higher output voltage level.
Amplifier output voltage is applied to the positive inputs of
the comparators via the correction summing networks.
Out-of-phase sawtooth signals are applied to the two
comparators inverting inputs. Increasing error amplifier
voltage results in increased comparator output duty cycle.
FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6552 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO POWER
FB
AMPLIFIER
PROGRAMMABLE
REFERENCE
DAC
ERROR
CHANNEL REGULATOR
R
IN
+
L1
-
and I
L2
CORRECTION
CORRECTION
, of the two power channels. The
+
+
-
-
8
∑
∑
∑
∑
-
-
+
I AVERAGE
+
COMPARATOR
AVERAGING
COMPARATOR
CURRENT
ISL6552
+
-
+
-
CURRENT
CURRENT
SENSING
SENSING
IN
ISL6552
CIRCUIT
CIRCUIT
PWM
PWM
This increased duty cycle signal is passed through the PWM
circuit with no phase reversal and on to the HIP6601, again
with no phase reversal for gate drive to the upper MOSFETs,
Q1 and Q3. Increased duty cycle or ON time for the
MOSFET transistors results in increased output voltage to
compensate for the low output voltage sensed.
Current Loop
The current control loop works in a similar fashion to the
voltage control loop, but with current control information
applied individually to each channel’s comparator. The
information used for this control is the voltage that is
developed across r
Q4, when they are conducting. A single resistor converts and
scales the voltage across the MOSFETs to a current that is
applied to the current sensing circuit within the ISL6552.
Output from these sensing circuits is applied to the current
averaging circuit. Each PWM channel receives the difference
current signal from the summing circuit that compares the
average sensed current to the individual channel current.
When a power channel’s current is greater than the average
current, the signal applied via the summing correction circuit
to the comparator, reduces the output pulse width of the
PWM1
PWM2
ISEN1
ISEN2
HIP6601
HIP6601
R
R
ISEN2
ISEN1
DS(ON)
Q2
Q4
V
V
IN
IN
Q1
Q3
of each lower MOSFET, Q2 and
PHASE
PHASE
L1
I
L1
L2
I
L2
V
C
CORE
OUT
R
LOAD