LTC3719EG Linear Technology, LTC3719EG Datasheet - Page 28

• Manufacturer Part Number: LTC3719EG
• Description: IC SW REG SYNC STEP-DOWN 36-SSOP
• Manufacturer: Linear Technology

Specifications of LTC3719EG

• Applications: Controller, AMD Opteron™
• Voltage - Input: 4 ~ 36 V
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 1.55 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LTC3719
APPLICATIO S I FOR ATIO
Figure 4 illustrates the RMS input current drawn from the
input capacitance vs the duty cycle as determined by the
ratio of input and output voltage. The peak input RMS
current level of the single phase system is reduced by 50%
in a 2-phase solution due to the current splitting between
the two stages.
An interesting result of the 2-phase solution is that the V
which produces worst-case ripple current for the input
capacitor, V
duces zero input current ripple in the 2-phase design.
The output ripple current is reduced significantly when
compared to the single phase solution using the same
inductance value because the V
term from the stage that has its bottom MOSFET on
subtracts current from the (V
resulting from the stage which has its top MOSFET on. The
output ripple current is:
28
OUT
= V
U
IN
/2, in the single phase design pro-
U
IN
– V
OUT
OUT
W
/L discharge current
)/L charging current
U
IN
where D is duty factor.
The input and output ripple frequency is increased by the
number of stages used, reducing the output capacity
requirements. When V
as illustrated in Figures 3 and 4, very low input and output
ripple currents result.
Figure 11 shows a typical application using LTC3719 to
power the AMD CPU core. The input can vary from 7V to
24V, the output voltage can be programmed from 0.8V to
1.55V with a maximum current of 45A. This power supply
receives three input signals to generate different output
voltage offsets based on the operation conditions.
I
RIPPLE
2
V
fL
OUT
IN
1 2
is approximately equal to 2(V
1 2
D
D
1
1
D
sn3719 3719fs
OUT
)