PM6685 STMicroelectronics, PM6685 Datasheet - Page 6

IC CTLR DUAL SYNC STDN 5X5VFQFPN

PM6685

Manufacturer Part Number
PM6685
Description
IC CTLR DUAL SYNC STDN 5X5VFQFPN
Manufacturer
STMicroelectronics
Datasheets

Specifications of PM6685

Applications
Controller, Notebook Power System
Voltage - Input
6 ~ 28 V
Number Of Outputs
2
Voltage - Output
-3.3V, 5V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, 32-VFQFPN
Output Voltage
5 V, 3.3 V
Output Current
0.1 A
Input Voltage
5.5 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 10 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin settings
2.2
Table 2.
6/48
Pin
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
CSENSE3
HGATE3
PHASE3
PGOOD
LGATE3
LGATE5
COMP3
SGND1
SGND2
BOOT3
SHDN
PGND
V5SW
Name
LDO3
LDO3
OUT3
LDO5
FSEL
EN3
Pin functions
Functions
Signal ground. Reference for internal logic circuitry. It must be connected to the signal ground
plan of the power supply. The signal ground plan and the power ground plan must be connected
together in one point near the PGND pin.
DC voltage error compensation pin for the 3.3V switching section.
Frequency selection pin.
It provides a selectable switching frequency, allowing, allowing three different values of switching
frequencies for the 5V/3.3V switching sections.
3.3V SMPS enable input.
– The 3.3V section is enabled applying a voltage greater than 2.4V to this pin.
– The 3.3V section is disabled applying a voltage lower than 0.8V.
When the section is disabled the High Side gate driver goes low and Low Side gate driver goes
high. If both EN3 and EN5 pins are low and SHDN pin is high the device enters in standby mode.
Shutdown control input.
– The device switch off if the SHDN voltage is lower than 0.8V (Shutdown mode)
– The device switch on if the SHDN voltage is greater than 1.7V.
The SHDN pin can be connected to the battery through a voltage divider to program an
undervoltage lockout. In shutdown mode, the gate drivers of the two switching sections are in
high impedance (high-Z).
Power Good signal for the 3.3V linear regulator. This pin is an open drain output. It is shorted to
GND if LDO3_SEL pin is at its low level or if the output voltage on LDO3 pin is lower than 2.6V.
3.3V Linear regulator output. LDO3 can provide 100mA peak current.
Output voltage sense for the 3.3V switching section.This pin must be directly connected to the
output voltage of the switching section.
Bootstrap capacitor connection for the switching 3.3V section. It supplies the high-side gate
driver.
High-side gate driver output for the 3.3V section.
Switch node connection and return path for the high side driver for the 3.3V section.
Current sense input for the 3.3V section. This pin must be connected through a resistor to the
drain of the synchronous rectifier (R
Low-side gate driver output for the 3.3V section.
Power ground. This pin must be connected to the power ground plan of the power supply.
Low-side gate driver output for the 5V section.
Signal ground for analog circuitry. It must be connected to the signal ground plan of the power
supply.
Internal 5V regulator bypass connection.
– If V5SW is connected to OUT5 (or to an external 5V supply) and V5SW is greater than 4.9V,
– If V5SW is connected to GND, the LDO5 linear regulator is always on.
5V internal regulator output. It can provide up to 100mA peak current. LDO5 pin supplies
embedded low side gate drivers and an external load.
the LDO5 regulator shuts down and the LDO5 pin is directly connected to OUT5 through a 3W
(max) switch.
Doc ID 11674 Rev 8
DSON
Description
sensing) to set the current limit threshold.
PM6685

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