LT1766EFE#TRPBF Linear Technology, LT1766EFE#TRPBF Datasheet - Page 25

• Manufacturer Part Number: LT1766EFE#TRPBF
• Description: IC REG SW HV 1.5A 200KHZ 16TSSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT1766EFE#TRPBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.2 ~ 54 V
• Current - Output: 1.5A
• Frequency - Switching: 200kHz
• Voltage - Input: 5.5 ~ 60 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS INFORMATION
Using the values shown in Figure 10,
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can
be used for sequencing multiple regulator outputs.
DUAL OUTPUT SEPIC CONVERTER
The circuit in Figure 14 generates both positive and nega-
tive 5V outputs with a single piece of magnetics. The two
inductors shown are actually just two windings on a stan-
dard Coiltronics inductor. The topology for the 5V output
is a standard buck converter. The – 5V topology would be
a simple fl yback winding coupled to the buck converter
if C4 were not present. C4 creates a SEPIC (single-ended
primary inductance converter) topology which improves
regulation and reduces ripple current in L1. Without C4,
the voltage swing on L1B compared to L1A would vary
due to relative loading and coupling losses. C4 provides a
low impedance path to maintain an equal voltage swing in
L1B, improving regulation. In a fl yback converter, during
switch on-time, all the converter’s energy is stored in L1A
only, since no current fl ows in L1B. At switch off, energy
RiseTime
Rise Time
INPUT
40V
Figure 13. Buck Converter with Adjustable Soft-Start
C3
2.2μF
50V
CER
V
SHDN
=
SYNC
=
IN
0.022μF
BOOST
( )( )( )
(
R
LT1766
47 10
C
2.2k
GND
C
R
4
C
•
BIAS
C
SS
V
V
SW
FB
C
BE
3
)(
C
220pF
F
0 7
V
15 10
.
OUT
•
Q1
C2
0.33μF
D1
1N4148W
–
9
47μH
100μF
D2
L1
R4
47k
)
( )
C1
R3
2k
5
+
15nF
=
C
SS
5
ms
R1
15.4k
R2
4.99k
1766 F13
OUTPUT
5V
1A
is transferred by magnetic coupling into L1B, powering
the –5V rail. C4 pulls L1B positive during switch on-time,
causing current to fl ow, and energy to build in L1B and
C4. At switch off, the energy stored in both L1B and C4
supply the –5V rail. This reduces the current in L1A and
changes L1B current waveform from square to triangular.
For details on this circuit, including maximum output cur-
rents, see Design Note 100.
POSITIVE-TO-NEGATIVE CONVERTER
The circuit in Figure 15 is a positive-to-negative topology
using a grounded inductor. It differs from the standard
approach in the way the IC chip derives its feedback signal
because the LT1766 accepts only positive feedback signals.
The ground pin must be tied to the regulated negative
output. A resistor divider to the FB pin then provides the
proper feedback voltage for the chip.
The following equation can be used to calculate maximum
load current for the positive-to-negative converter:
* L1 IS A SINGLE CORE WITH TWO WINDINGS
†
TO 60V
I
GND
COILTRONICS #CTX50-3A
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
D1, D3: 10MQ060N
100V
2.2μF
MAX
7.5V
CER
V
C3
IN
=
⎡
⎢
⎣
Figure 14. Dual Output SEPIC Converter
I
P
V
SHDN
SYNC
GND
–
IN
0.022μF
2
(
LT1766
(
2.2k
C
BOOST
V
C
V
R
C
OUT
OUT
(
V
IN
V
SW
LT1766/LT1766-5
C
FB
+
)(
+
100μF
TANT
C
220pF
10V
V
V
V
C4
F
0.33μF
OUT
IN
IN
+
)( )( )
C2
– . )(
)
f L
0 3
1N4148W
L1B*
D1
D3
D2
50μH
⎤
⎥
⎦
4.99k
15.4k
L1A*
(
V
100μF
R2
R1
TANT
V
OUT
10V
OUT
C5
+
+
+
)(
1766 F14
V
V
C1
100μF
10V
TANT
V
5V
(SEE DN100
FOR MAX I
F
IN
OUT1
V
–5V
)
OUT2
– . )
†
25
0 3
OUT
1766fc
)