AD9851/FSPCB Analog Devices Inc, AD9851/FSPCB Datasheet - Page 10

• Manufacturer Part Number: AD9851/FSPCB
• Description: BOARD EVAL FOR AD9851/FS
• Manufacturer: Analog Devices Inc
• Series: AgileRF™r

Specifications of AD9851/FSPCB

• Rohs Status: RoHS non-compliant
• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Utilized Ic / Part: AD9851/FS
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

IOUT and IOUTB are equally loaded with 100 . Two 100 k
resistors sample each output and average the two voltages. The
result is filtered with the 470 pF capacitor and applied to one
comparator input as a dc switching threshold. The filtered DAC
sine wave output is applied to the other comparator input. The
comparator will toggle with nearly 50% duty cycle as the sine
wave alternately traverses the center point threshold.
AD9851
IF FREQUENCY
REFERENCE
Figure 4. Frequency/Phase-Agile Reference for PLL
Figure 3. Frequency/Phase-Agile Local Oscillator
for Frequency Mixing/Multiplying
CLOCK
REFERENCE
MICROCONTROLLER
CLOCK
MICROPROCESSOR
IN
180MHz OR 30MHz
REFERENCE
COMPARATOR
OR
DIVIDE-BY-N
CLOCK
AD9851
FILTER
PHASE
DDS
AD9851
FILTER
RF IN
Figure 1. Chip Rate Clock Generator Application in a Spread Spectrum Receiver
DDS
Rx
DATA
BUS
VCA
FILTER
TUNING
WORD
LOOP
3.9k
8-BIT PARALLEL DATA,
OR 1-BIT  40 SERIAL DATA,
RESET, W CLK AND FQ UD
FILTER
TUNING
WORD
R
SET
Tx CHIP/SYMBOL/PN RATE
VCO
ADC CLOCK FREQUENCY
AD9851
REFERENCE
LOW-PASS
OR 30MHz
Figure 2. Basic Clock Generator Configuration
I/Q MIXER
180MHz
FILTER
CLOCK
QOUT
AND
OUTPUTS
CMOS
RF
FREQUENCY
OUT
LOCKED TO
RF
FREQUENCY
OUT
QOUTB
Q
I
IOUTB
IOUT
GENERATOR
8-BIT ADC
AD9851
AD9059
CLOCK
DUAL
ADC ENCODE
–10–
470pF
High quality, all digital RF frequency modulation generation with
the ADSP-2181 DSP and the AD9851 DDS is well documented
in Analog Devices’ application note AN-543. It uses an image of
the DDS output as illustrated in Figure 8.
AUDIO IN
CHIP/SYMBOL/PN
L & R
8
8
100k
100k
100
REFERENCE
RATE DATA
CLOCK
Figure 5. Digitally Programmable Divide-by-N
Function in PLL
Figure 6. High Quality, All Digital RF Frequency
Modulation
32
EZ-KIT LITE
PROCESSOR
FILTER
DEMODULATOR
ADSP-2181
STEREO
AD1847
CODEC
DIGITAL
VOLTAGE HERE = CENTER POINT
OF SINE WAVE (0.5V TYPICALLY)
USING PASSIVE AVERAGING CIRCUIT
DSP
DSP
200
7TH ORDER ELLIPTICAL
COMPARATOR
70MHz LOW PASS
200 IMPEDANCE
AGC
AD9851
TUNING
PHASE
WORD
LOW-PASS
DDS
ADSP-2181
BUS
FILTER
DECODE
OUTPUT
Rx BASEBAND
DIGITAL DATA OUT
INPUT/
LOGIC
REF CLK IN
FILTER
(WHERE N = 2
DATA
LOOP
8-BIT
BUS
DIVIDE-BY-N FUNCTION
200
PROGRAMMABLE
AD9851/FSPCB
EVALUATION
AD9851
VCO
DDS
BOARD
32
/ TUNING WORD)
0 TO 1V p-p
SINE WAVE
REF
OSC
DAC
OUT
RF
FREQUENCY
OUT
FM RF
OUTPUT
REV. D