AD9851/FSPCB Analog Devices Inc, AD9851/FSPCB Datasheet - Page 8

• Manufacturer Part Number: AD9851/FSPCB
• Description: BOARD EVAL FOR AD9851/FS
• Manufacturer: Analog Devices Inc
• Series: AgileRF™r

Specifications of AD9851/FSPCB

• Rohs Status: RoHS non-compliant
• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Utilized Ic / Part: AD9851/FS
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

TPC 11. Output Residual Phase Noise (5.2 MHz A
REFCLK Multiplier Disabled, System Clock = 180 MHz, Ref-
erence Clock = 180 MHz
TPC 12. Spurious-free dynamic range (SFDR) is generally
a function of the DAC analog output frequency. Analog
output frequencies of 1/3 the system clock rate are consid-
ered worst case. Plotted below are typical worst case SFDR
numbers for various system clock rates.
AD9851
–120
–125
–130
–135
–140
–145
–150
–155
1
Tek Stop 2.50GS/s
75
70
65
60
55
50
45
TPC 13. Comparator RiseTime, 15 pF Load
100
Ch1 100mV
@ : 105.2ns
 : 2.0ns
10
C1 Rise
2.03ns
20
V
SYSTEM CLOCK FREQUENCY – MHz
S
= +5V
40
FREQUENCY OFFSET – Hz
1k
60
V
T
22 Acgs
AD9851 RESIDUAL PHASE NOISE
S
FUNDAMENTAL OUTPUT =
SYSTEM CLOCK/3
80
= +3.3V
[
100
]
M 20.0ns Ch 1
D 5.00ns Runs After
120 140
10k
160
252mV
180
OUT
OUT
OUT
100k
), 6
), 6

–8–
TPC 15. Supply current variation with analog
output frequency at 180 MHz system clock (upper
trace) and 125 MHz system clock (lower trace)
TPC 16. Supply current variation with system
clock frequency
1
120
110
100
120
100
Tek Stop 2.50GS/s
90
80
70
60
50
30
40
80
60
40
20
0
TPC 14. Comparator FallTime, 15 pF Load
0
0
Ch1 100mV
20
10
ANALOG OUTPUT FREQUENCY – MHz
40
20
60
SYSTEM CLOCK – MHz
V
V
S
S
2227 Acgs
= +3.3V
= +5V
T [
30
80
V
V
S
S
= +5V
]
= +3.3V
100
40
M 20.0ns Ch 1
D 5.00ns Runs After
120
50
@ : 103.6ns
 : 2.3ns
140
C1 Fall
2.33ns
60
252mV
160
180
70
REV. D