DS50EV401-EVK National Semiconductor, DS50EV401-EVK Datasheet - Page 10

• Manufacturer Part Number: DS50EV401-EVK
• Description: KIT EVAL DS50EV401 EQUALIZER
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of DS50EV401-EVK

• Main Purpose: Interface, Cable Equalizer
• Utilized Ic / Part: DS50EV401
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -

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The CML inputs are AC coupled to the device as shown in
Figure
The CML outputs drive 100 Ω transmission lines and are AC
coupled and terminated at their load.
The ENABLE inputs and SIGNAL DETECT outputs are op-
tional. Internal to the device the signal detect circuity is con-
nected to the enable circuit providing the automatic power
management feature. When the No-signal condition is de-
tected, the respective channel is placed in standby mode. The
7. Internal to the device are 50Ω terminations to V
FIGURE 7. Typical Interface Circuit
DD
.
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MODE pin is used to select between low and high data rate
equalization settings. Depending upon the application it may
be tied High, tied Low, or driven. There are several reserved
pins on the device, these are NC pins and should be left open.
Power is supplied through six V
capacitor is recommended per pin as close to the device as
possible. A larger bulk capacitor is also recommended to be
placed near by the device. Ground is supplied to the device
via the ground pins and also the DAP.
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pins to the device. A 0.1µF
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