MAX1402EVKIT Maxim Integrated Products, MAX1402EVKIT Datasheet - Page 23

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MAX1402EVKIT

Manufacturer Part Number
MAX1402EVKIT
Description
EVAL KIT FOR MAX1402
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX1402EVKIT

Number Of Adc's
1
Number Of Bits
18
Sampling Rate (per Second)
480
Data Interface
Serial
Inputs Per Adc
6 Single Ended
Input Range
±VREF/2
Power (typ) @ Conditions
26.7mW @ 480SPS
Voltage Supply Source
Analog and Digital
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
MAX1402
Interface Type
SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MAX1402
DS1, DS0: The status of the auxiliary data input pins.
These are latched on the first falling edge of the SCLK
signal for the current data register read access.
CID2–0: Channel ID tag (Table 11).
A switching network provides selection between three
fully differential input channels or five pseudo-differen-
tial channels, using AIN6 as a shared common. The
switching network provides two additional fully differen-
tial input channels intended for system calibration,
which may be used as extra fully differential signal
channels. Table 12 shows the channel configurations
available for both operating modes.
Table 12. Input Channel Configuration in Fully and Pseudo-Differential Modes
(SCAN = 0)
X = Don’t care
* This combination is available only in pseudo-differential mode when using the internal scanning logic
** These combinations are only available in the calibration modes.
Table 11. Channel ID Tag Codes
CID2
M1
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
1
1
1
CID1
M0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
1
1
0
0
1
1
______________________________________________________________________________________
+5V, 18-Bit, Low-Power, Multichannel,
DIFF
CID0
0
0
0
0
X
X
X
1
1
1
X
X
0
1
0
1
0
1
0
1
Switching Network
Oversampling (Sigma-Delta) ADC
A1
AIN1–AIN6
AIN2–AIN6
AIN3–AIN6
AIN4–AIN6
AIN1–AIN2
AIN3–AIN4
AIN5–AIN6
0
0
1
1
X
X
X
0
0
1
X
X
CHANNEL
Calibration
A0
X
X
X
X
X
0
1
0
1
0
1
0
To sample and convert the available input channels
sequentially, set the SCAN control bit in the global
setup register. The sequence is determined by DIFF
(fully differential or pseudo-differential) and by the
mode control bits M1 and M0 (Tables 8, 9, 10). With
SCAN set, the part automatically sequences through
each available channel, transmitting a single conver-
sion result before proceeding to the next channel. The
MAX1402 automatically allows sufficient time for each
conversion to fully settle, to ensure optimum resolution
before asserting the data-ready signal and moving to
the next available channel. The scan rate is, therefore,
dependent on the clock bit (CLK), the filter control bits
(FS1, FS0), and the modulator frequency selection bits
(MF1, MF0).
The input circuitry also provides two “burn-out” cur-
rents. These small currents may be used to test the
integrity of the selected transducer. They can be selec-
tively enabled or disabled by the BOUT bit in the global
setup register.
The MAX1402 provides two matched 200µA transducer
excitation currents at OUT1 and OUT2. These currents
Differential
Differential
Pseudo-
MODE
Fully
CALGAIN+**
CALGAIN+**
HIGH INPUT
CALOFF+**
CALOFF+**
Transducer Excitation Currents
AIN5*
AIN1
AIN2
AIN3
AIN4
AIN1
AIN3
AIN5
Scanning (SCAN-Mode)
Burn-Out Currents
LOW INPUT
CALGAIN-**
CALGAIN-**
CALOFF-**
CALOFF-**
AIN6*
AIN6
AIN6
AIN6
AIN6
AIN2
AIN4
AIN6
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