MAX1402EVKIT Maxim Integrated Products, MAX1402EVKIT Datasheet - Page 30

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MAX1402EVKIT

Manufacturer Part Number
MAX1402EVKIT
Description
EVAL KIT FOR MAX1402
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX1402EVKIT

Number Of Adc's
1
Number Of Bits
18
Sampling Rate (per Second)
480
Data Interface
Serial
Inputs Per Adc
6 Single Ended
Input Range
±VREF/2
Power (typ) @ Conditions
26.7mW @ 480SPS
Voltage Supply Source
Analog and Digital
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
MAX1402
Interface Type
SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MAX1402
when valid data is available, a minimum of three data-
word periods later.
The digital filter can be bypassed by setting the MDOUT
bit in the global setup register. When MDOUT = 1, the
raw output of the modulator is directly available at DOUT.
The MAX1402 digital filter implements both a SINC
(sinx/x) and SINC
transfer function for the SINC
cascaded SINC
and in the frequency domain by:
where N, the decimation factor, is the ratio of the modu-
lator frequency f
Figure 10 shows the filter frequency response. The
SINC
first notch frequency. This results in a cutoff frequency
of 15.72Hz for a first filter notch frequency of 60Hz. The
response shown in Figure 10 is repeated at either side
of the digital filter’s sample frequency (f
side of the related harmonics (2f
The response of the SINC
SINC
The output data rate for the digital filter corresponds
with the positioning of the first notch of the filter’s fre-
quency response. Therefore, for the plot of Figure 10
where the first notch of the filter is at 60Hz, the output
data rate is 60Hz. The notches of this (sinx/x)
repeated at multiples of the first notch frequency. The
SINC
100dB at these notches.
Determine the cutoff frequency of the digital filter by the
value loaded into CLK, X2CLK, MF1, MF0, FS1, and FS0
in the global setup register. Programming a different
cutoff frequency with FS0 and FS1 does not alter the
profile of the filter response; it changes the frequency of
the notches. For example, Figure 11 shows a cutoff fre-
quency of 13.1Hz and a first notch frequency of 50Hz.
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
30
______________________________________________________________________________________
3
1
3
characteristic cutoff frequency is 0.262 times the
(averaging filter) filter but with a sharper rolloff.
filter provides an attenuation of better than
H(f)
1
H(z)
M
filters described in the z-domain by:
3
to the output frequency f
=
(sinx/x)
=
N
1
N
1
sin N
3
3
sin
Filter Characteristics
lowpass filter function. The
1
filter is similar to that of a
1 – z
3
π
function is that of three
π
M
f
M
z
f
f
M
, 3f
f
N
1
M
3
, . . .).
3
M
) and at either
N
.
3
filter are
1
For step changes at the input, a settling time must be
allowed before valid data can be read. The settling time
depends upon the output data rate chosen for the filter.
The settling time of the SINC
input can be up to four times the output data period.
For a synchronized step input (using the FSYNC func-
tion or the internal scanning logic), the settling time is
three-times the output data period.
Figure 11. Frequency Response of the SINC
(Notch at 50Hz)
Figure 10. Frequency Response of the SINC
60Hz)
-100
-120
-140
-160
-100
-120
-140
-160
-20
-40
-60
-80
-20
-40
-60
-80
0
0
0
0
20
20
40 60 80
40 60 80
FREQUENCY (Hz)
FREQUENCY (Hz)
100 120 140 160 180 200
100 120 140 160 180 200
3
f
MF1, 0 = 0
FS1, 0 = 0
f
filter to a full-scale step
f
MF1, 0 = 0
FS1, 0 = 1
f
CLKIN
N
CLKIN
N
= 50Hz
= 60Hz
= 2.4576MHz
= 2.4576MHz
3
3
Filter
Filter (Notch at

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