Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 107

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
PS025011-1010
2. Write to the Timer Control 2 register to choose the timer clock source.
3. Write to the Timer Control 0 register to set the timer interrupt configuration field
4. Write to the Timer High and Low Byte registers to set the starting count value. 
5. Write to the Timer Reload High and Low Byte registers to set the reload value.
6. If required, enable the timer interrupt and set the timer interrupt priority by writing to
7. If using the Timer Output function, configure the associated GPIO port pin for the
8. Write to the Timer Control 1 register to enable the timer.
In COMPARATOR COUNTER mode, the number of comparator output transitions since
the timer start is given by the following equation:
PWM Single Output Mode
In PWM Single Output mode, the timer outputs a Pulse Width Modulator output 
signal through a GPIO Port pin. The Timer counts timer clocks up to the 16-bit Reload
value. The timer first counts up to the 16-bit PWM match value stored in the Timer PWM0
High and Low Byte registers. When the timer count value matches the PWM value, the
Timer Output toggles. The timer continues counting till it reaches the 
Reload value stored in the Timer Reload High and Low Byte registers. On reaching the
Reload value, the timer generates an interrupt, the count value in the Timer High and 
Low Byte registers is reset to
If the TPOL bit in the Timer Control 1 register is set to 1, the Timer Output signal begins
as High (1) and then transitions to Low (0) when the timer value matches the PWM value.
The Timer Output signal returns to High (1) after the timer reaches the Reload value and is
reset to
If the TPOL bit in the Timer Control 1 register is set to 0, the Timer Output signal begins
as Low (0) and then transitions to High (1) when the timer value matches the PWM value.
The Timer Output signal returns to Low (0) after the timer reaches the Reload value and is
reset to
TICONFIG.
This only affects the first pass in COMPARATOR COUNTER mode. After the first
timer Reload in COMPARATOR COUNTER mode, counting always begins at the
reset value of
High and Low Byte registers must be written with the value 0001H.
the relevant interrupt registers.
Timer Output alternate function.
0001H
0001H
.
.
Comparator Output Transitions
0001H
. Generally, in COMPARATOR COUNTER mode the Timer
P R E L I M I N A R Y
0001H
and counting resumes.
=
Current Count Value - Start Value
Z8 Encore! XP
Product Specification
®
F1680 Series
Timers
93

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