M68ICS05KJ Freescale Semiconductor, M68ICS05KJ Datasheet - Page 238

• Manufacturer Part Number: M68ICS05KJ
• Description: SIM PROGRAM FOR 68HC705KJ/J1A
• Manufacturer: Freescale Semiconductor
• Type: Simulator/Programmerr

Specifications of M68ICS05KJ

• Contents: Programmer, Power Supply, Assembler/Simulator/Debugger, Cable, Software and Documentation
• For Use With/related Products: 68HC705KJ/JIA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

GLOSSARY
memory location
N
object code file
operand
opcode
OTPROM
PC
program counter
RAM
Glossary-4
In the MC68HC05, each memory location holds one byte of data
and has a unique address. To store information into a memory
location the CPU places the address of the location on the address
bus, the data information on the data bus, and asserts the write
signal. To read information from a memory location the CPU
places the address of the location on the address bus and asserts the
read signal. In response to the read signal, the selected memory
location places its data onto the data bus.
Abbreviation for “negative,” a bit in the condition codes register of
the MC68HC05. In twos-complement computer notation, positive
signed numbers have a zero in their MSB and a negative numbers
have a one in their MSB. The N condition code bit reflects the sign
of the result of an operation. After a load accumulator instruction,
the N bit will be set if the MSB of the loaded value was a one.
A text file containing numbers that represent the binary opcodes
and data of a computer program. An object code file can be used to
load binary information into a computer system. Motorola uses the
S-record file format for object code files.
An input value to a logical or mathematical operation.
A binary code that instructs the CPU to do a specific operation in a
specific way. The MC68HC05 CPU recognizes 210 unique 8-bit
opcodes that represent addressing mode variations of 62 basic
instructions.
A non-volatile type of memory that can be programmed but cannot
be erased. An OTPROM is an EPROM MCU that is packaged in
an opaque plastic package, it is called a “one-time-programmable”
MCU because there is no way to expose the EPROM to a UV light.
Abbreviation for program counter CPU register of the MC68HC05.
The CPU register that holds the address of the next instruction or
operand that the CPU will use.
Random Access Memory. Any RAM location can be read or
written by the CPU. The contents of a RAM memory location
remain valid until the CPU writes a different value or until power
is turned off.
M68ICS05KJOM/D