M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 112

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 5.4.2 Initial setting example for registers relevant to event counter mode (1)
TIMER A
5.4 Event counter mode
5–22
5.4.1 Setting for event counter mode
Figures 5.4.2 and 5.4.3 show an initial setting example for registers relevant to the event counter mode.
Note that when using interrupts, set up to enable the interrupts. For details, refer to “Chapter 4. INTERRUPTS.”
Setting up–down register
b7
(b15)
Setting divide ratio
b7
Selecting event counter mode and each function
b7
b0
0
Timer A0 up–down bit
Timer A1 up–down bit
Timer A2 up–down bit
Timer A3 up–down bit
Timer A4 up–down bit
Timer A2 two–phase pulse signal processing select bit
Timer A3 two–phase pulse signal processing select bit
Timer A4 two–phase pulse signal processing select bit
Up–down register (Address 44
Continue to Figure 5.4.3 on next page.
b0
(b8)
b7
0 1
7702/7703 Group User’s Manual
b0
Selection of event counter mode
Pulse output function select bit
Count polarity select bit
Up-down switching factor select bit
(Addresses 56
Can be set to
Timer Ai mode register (i = 0 to 4)
0: No pulse output
1: Pulse output
0: Counts at falling edge of external signal.
1: Counts at rising edge of external signal.
0: Contents of up-down register
1: Input signal to TAi
Set the corresponding bit to “1” when the two–phase pulse
signal processing function is selected for timers A2 to A4.
0: Down–count
1: Up–count
0: Two–phase pulse signal processing
1: Two–phase pulse signal processing
Set the corresponding up–down bit when the contents of
the up-down register are selected as the up-down
sw itching factor.
16
The counter divides the count source frequency by n + 1
function disabled
function enabled
when down-counting, or by FFFF
counting.
“
)
0000
16
b0
to 5A
: It may be either “0” or “1.”
16
”
Timer A0 register (Addresses 47
Timer A1 register (Addresses 49
Timer A2 register (Addresses 4B
Timer A3 register (Addresses 4D
Timer A4 register (Addresses 4F
to
OUT
16
“
FFFF
)
pin
16
”
(n).
16
– n + 1 when up-
16
16
16
16
16
, 46
, 48
, 4E
, 4A
, 4C
16
16
16
16
16
)
)
)
)
)