M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 261

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 10.2.1 Stop mode terminating sequence by interrupt request occurrence
stabilized.
area retains the same contents as that before executing the STP instruction. The termination sequence is
the same as the internal processing sequence which is performed after a reset.
performed, use software after a reset.
10.2.2 Termination by hardware reset
Supply “L” level to the RESET pin by using the external circuit until the oscillation of the oscillator is
The CPU and the SFR area are initialized in the same way as a system reset. However, the internal RAM
To determine whether a hardware reset was performed to terminate Stop mode or a system reset was
Refer to “Chapter 13. RESET” for details about a reset.
Value of watchdog timer
Internal peripheral devices
(Interrupt request bit)
used to terminate
Interrupt request
Stop mode
CPU
,
f(X
“7FF
“FFF
BIU
IN
______
1
)
CPU
“1”
“0”
16
16
”
”
Operating
Operating
STP instruction
is executed
7702/7703 Group User’s Manual
Stop mode
Stopped
Stopped
Interrupt request used to
Oscillation starts.(When
Watchdog timer starts
terminate Stop mode
occurs.
an external clock is input
from the X
input starts.)
counting.
f
32
IN
Operating
pin, clock
Stopped
2048 counts
10.2 Operation description
Watchdog timer’s MSB = “0”
Supply of
Interrupt request which has been used
to terminate Stop mode is accepted.
(However, watchdog timer interrupt
request does not occur.)
Operating
Operating
STOP MODE
CPU
,
BIU
starts.
10–5