M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 453

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Appendix 2. Memory assignment in SFR area
Figures 6 to 9 show the memory assignment in SFR area.
The significations which are used in Figures 6 to 9 is described below.
Fig. 6 Memory assignment in SFR area (1)
Access characteristics
State immediately after a reset
WO
R W
R O
?
0
1
: “0” immediately after a reset.
: “1” immediately after a reset.
: Undefined immediately after
a reset.
: It is possible to read the bit state at reading. The written value becomes valid data.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid data. It is impossible to read the bit state.
: Nothing is assigned. It is impossible to read the bit state. The written value is ignored.
1C
1D
Address
1A
1B
1E
1F
10
11
12
13
14
15
16
17
18
19
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
: In the 7703 Group, set “1” to the bit of which corresponding pin is nothing. (Refer to section “20.4.1 Input/Output pins.” )
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Port P5 direction register
Port P6 direction register
Port P7 direction register
Port P0 direction register
Port P1 direction register
Port P2 direction register
Port P3 direction register
Port P4 direction register
Port P8 direction register
A-D control register
A-D sweep pin select register
Register name
Port P8 register
Port P0 register
Port P1 register
Port P2 register
Port P3 register
Port P4 register
Port P5 register
Port P6 register
Port P7 register
b7
0
0
?
7702/7703 Group User’s Manual
: Always undefined at reading
: “0” immediately after a reset. Fix this bit to “0.”
Access characteristics
: Always “0” at reading
Appendix 2. Memory assignment in SFR area
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
b0
b7
State immediately after a reset
0
0
0
?
0
0
0
?
0
0
0
?
0
0
0
?
00
00
00
00
00
00
00
00
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
16
16
16
16
16
16
16
16
0
?
0
APPENDIX
?
?
0
?
1
0
?
1
0
?
b0
21–7