M37702E6BFS Renesas Electronics America, M37702E6BFS Datasheet - Page 144

• Manufacturer Part Number: M37702E6BFS
• Description: EPROM MCU/8BIT CMOS EMULATION CH
• Manufacturer: Renesas Electronics America

Specifications of M37702E6BFS

• Accessory Type: Emulator EPROM MCU
• For Use With/related Products: 7702
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fig. 6.2.4 Structure of timer Bi interrupt control register
TIMER B
6.2 Block description
6–6
6.2.4 Timer Bi interrupt control register
Figure 6.2.4 shows the structure of the timer Bi interrupt control register. For details about interrupts, refer
to “Chapter 4. INTERRUPTS.”
(1) Interrupt priority level select bits (bits 2 to 0)
(2) Interrupt request bit (bit 3)
b7
levels 1 to 7. When the timer Bi interrupt request occurs, its priority level is compared with the
processor interrupt priority level (IPL), so that the requested interrupt is enabled only when its priority
level is higher than the IPL. (However, this applies when the interrupt disable bit (I) = “0.”) To disable
timer Bi interrupts, set these bits to “000
“0” when the timer Bi interrupt request is accepted. This bit can be set to “1” or cleared to “0” by
software.
These bits select a timer Bi interrupt’s priority level. When using timer Bi interrupts, select priority
This bit is set to “1” when the timer Bi interrupt request occurs. This bit is automatically cleared to
b6
b5
b4
b3
b2
b1
b0
Timer Bi interrupt control registers (i = 0 to 2) (Addresses 7A
Note: Use the SEB or CLB instruction to set each interrupt control register.
7 to 4
Bit
0
1
2
3
Interrupt priority level select bits
Interrupt request bit
Nothing is assigned.
7702/7703 Group User’s Manual
Bit name
2
” (level 0).
b2 b1 b0
0 0 0 : Level 0 (Interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : No interrupt request
1 : Interrupt request
Functions
Low level
High level
16
to 7C
16
)
Undefined
At reset
0
0
0
0
RW
RW
RW
RW
RW
–