PIC18F2420-I/ML Microchip Technology, PIC18F2420-I/ML Datasheet - Page 108
![IC PIC MCU FLASH 8KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F2420-I/ML
Manufacturer Part Number
PIC18F2420-I/ML
Description
IC PIC MCU FLASH 8KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2420-IML.pdf
(412 pages)
2.PIC18F2420-IML.pdf
(16 pages)
3.PIC18F2420-IML.pdf
(8 pages)
4.PIC18F2420-IML.pdf
(6 pages)
5.PIC18F2420-IML.pdf
(8 pages)
6.PIC18F2420-IML.pdf
(4 pages)
7.PIC18F4420-IP.pdf
(390 pages)
Specifications of PIC18F2420-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2420-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F2420-IML PDF datasheet
- PIC18F2420-IML PDF datasheet #2
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- PIC18F2420-IML PDF datasheet #4
- PIC18F2420-IML PDF datasheet #5
- PIC18F2420-IML PDF datasheet #6
- PIC18F4420-IP PDF datasheet #7
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- Download datasheet (7Mb)
PIC18F2420/2520/4420/4520
TABLE 10-1:
DS39631E-page 106
RA0/AN0
RA1/AN1
RA2/AN2/
V
RA3/AN3/V
RA4/T0CKI/C1OUT
RA5/AN4/SS/
HLVDIN/C2OUT
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
REF
-/CV
Pin
REF
REF
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
+
PORTA I/O SUMMARY
Function
HLVDIN
C1OUT
C2OUT
CV
V
T0CKI
OSC2
CLKO
OSC1
V
CLKI
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
RA5
AN4
RA6
RA7
REF
REF
SS
REF
+
-
Setting
TRIS
0
1
1
0
1
1
0
1
1
1
x
0
1
1
1
0
1
1
0
0
1
1
1
1
0
0
1
x
x
0
1
x
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
TTL
DIG
DIG
TTL
DIG
DIG
TTL
I/O
ST
ST
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input enabled.
A/D input channel 0 and comparator C1- input. Default input
configuration on POR; does not affect digital output.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; disabled when analog input enabled.
A/D input channel 1 and comparator C2- input. Default input
configuration on POR; does not affect digital output.
LATA<2> data output; not affected by analog input. Disabled when
CV
PORTA<2> data input. Disabled when analog functions enabled;
disabled when CV
A/D input channel 2 and comparator C2+ input. Default input
configuration on POR; not affected by analog output.
A/D and comparator voltage reference low input.
Comparator voltage reference output. Enabling this feature disables
digital I/O.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input enabled.
A/D input channel 3 and comparator C1+ input. Default input
configuration on POR.
A/D and comparator voltage reference high input.
LATA<4> data output.
PORTA<4> data input; default configuration on POR.
Timer0 clock input.
Comparator 1 output; takes priority over port data.
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input enabled.
A/D input channel 4. Default configuration on POR.
Slave select input for MSSP module.
High/Low-Voltage Detect external trip point input.
Comparator 2 output; takes priority over port data.
LATA<6> data output. Enabled in RCIO, INTIO2 and ECIO modes only.
PORTA<6> data input. Enabled in RCIO, INTIO2 and ECIO modes
only.
Main oscillator feedback output connection (XT, HS and LP modes).
System cycle clock output (F
modes.
LATA<7> data output. Disabled in external oscillator modes.
PORTA<7> data input. Disabled in external oscillator modes.
Main oscillator input connection.
Main clock input connection.
REF
output enabled.
REF
output enabled.
OSC
Description
/4) in RC, INTIO1 and EC Oscillator
© 2008 Microchip Technology Inc.
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