PIC18F2420-I/ML Microchip Technology, PIC18F2420-I/ML Datasheet - Page 158
![IC PIC MCU FLASH 8KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F2420-I/ML
Manufacturer Part Number
PIC18F2420-I/ML
Description
IC PIC MCU FLASH 8KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2420-IML.pdf
(412 pages)
2.PIC18F2420-IML.pdf
(16 pages)
3.PIC18F2420-IML.pdf
(8 pages)
4.PIC18F2420-IML.pdf
(6 pages)
5.PIC18F2420-IML.pdf
(8 pages)
6.PIC18F2420-IML.pdf
(4 pages)
7.PIC18F4420-IP.pdf
(390 pages)
Specifications of PIC18F2420-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2420-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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current from destroying the bridge power switches. The
controller instruction cycles (T
PIC18F2420/2520/4420/4520
16.4.6
In half-bridge applications where all power switches are
modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current (shoot-
through current) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from flow-
ing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally programmable
dead-band delay is available to avoid shoot-through
delay occurs at the signal transition from the nonactive
state to the active state (see Figure 16-4 for illustration).
Bits,
(Register 16-2) set the delay period in terms of micro-
are not available on 28-pin devices as the standard CCP
module does not support half-bridge operation.
16.4.7
When the CCP1 is programmed for any of the Enhanced
PWM modes, the active output pins may be configured
for auto-shutdown. Auto-shutdown immediately places
the Enhanced PWM output pins into a defined shutdown
state when a shutdown event occurs.
REGISTER 16-2:
DS39631E-page 156
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Note 1:
Note:
PRSEN
R/W-0
PDC<6:0>,
Reserved on 28-pin devices; maintain these bits clear.
PROGRAMMABLE DEAD-BAND
DELAY
Programmable dead-band delay is not
implemented in 28-pin devices with
standard CCP modules.
ENHANCED PWM AUTO-SHUTDOWN
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes away;
0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM
PDC6:PDC0: PWM Delay Count bits
Delay time, in number of F
signal to transition to active.
PDC6
R/W-0
the PWM restarts automatically
of
PWM1CON: PWM DEAD-BAND DELAY REGISTER
(1)
the
CY
W = Writable bit
‘1’ = Bit is set
PWM1CON
or 4 T
PDC5
R/W-0
OSC
(1)
OSC
). These bits
/4 (4 * T
register
PDC4
R/W-0
(1)
(1)
OSC
) cycles, between the scheduled and actual time for a PWM
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PDC3
R/W-0
A shutdown event can be caused by either of the
comparator modules, a low level on the Fault input pin
(FLT0) or any combination of these three sources. The
comparators may be used to monitor a voltage input
proportional to a current being monitored in the bridge
circuit. If the voltage exceeds a threshold, the
comparator switches state and triggers a shutdown.
Alternatively, a low digital signal on FLT0 can also trigger
a shutdown. The auto-shutdown feature can be disabled
by not selecting any auto-shutdown sources. The auto-
shutdown sources to be used are selected using the
ECCPAS<2:0> bits (ECCP1AS<6:4>).
When a shutdown occurs, the output pins are
asynchronously placed in their shutdown states,
specified by the PSSAC<1:0> and PSSBD<1:0> bits
(ECCPAS<2:0>). Each pin pair (P1A/P1C and P1B/
P1D) may be set to drive high, drive low or be tri-stated
(not driving). The ECCPASE bit (ECCP1AS<7>) is also
set to hold the Enhanced PWM outputs in their
shutdown states.
The ECCPASE bit is set by hardware when a shutdown
event occurs. If automatic restarts are not enabled, the
ECCPASE bit is cleared by firmware when the cause of
the shutdown clears. If automatic restarts are enabled,
the ECCPASE bit is automatically cleared when the
cause of the auto-shutdown has cleared.
If the ECCPASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCPASE bit is cleared,
the PWM outputs will return to normal operation at the
beginning of the next PWM period.
Note:
(1)
Writing to the ECCPASE bit is disabled
while a shutdown condition is active.
PDC2
R/W-0
(1)
© 2008 Microchip Technology Inc.
x = Bit is unknown
PDC1
R/W-0
(1)
PDC0
R/W-0
(1)
bit 0
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